PIC18FXX20
COMF
Complement f
CPFSEQ
Compare f with W, skip if f = W
Syntax:
[ label ] COMF f [,d [,a]
Syntax:
[ label ] CPFSEQ f [,a]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) → dest
N, Z
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
(f) – (W),
skip if (f) = (W)
(unsigned comparison)
Operation:
Operation:
Status Affected:
Encoding:
Status Affected:
Encoding:
Description:
None
0110
0001
11da
ffff
ffff
001a
ffff
ffff
Description:
The contents of register 'f' are com-
plemented. If 'd' is 0, the result is
stored in W. If 'd' is 1, the result is
stored back in register 'f' (default). If
‘a’ is 0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
Compares the contents of data
memory location 'f' to the contents
of W by performing an unsigned
subtraction.
If 'f' = W, then the fetched instruc-
tion is discarded and a NOPis exe-
cuted instead, making this a
two-cycle instruction. If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Write to
Words:
Cycles:
1
1(2)
Decode
Read
Process
register 'f'
Data
destination
Note: 3 cycles if skip and followed
by a 2-word instruction.
COMF
REG, 0, 0
Example:
Before Instruction
Q Cycle Activity:
Q1
REG
=
0x13
Q2
Q3
Q4
After Instruction
Decode
Read
Process
No
REG
W
=
=
0x13
0xEC
register 'f'
Data
operation
If skip:
Q1
Q2
Q3
Q4
No
operation
No
No
No
operation
operation
operation
If skip and followed by 2-word instruction:
Q1
Q2
No
Q3
No
Q4
No
operation
No
operation
operation
operation
No
operation
No
operation
No
operation
No
operation
HERE
NEQUAL
EQUAL
CPFSEQ REG, 0
:
:
Example:
Before Instruction
PC Address
=
HERE
W
=
?
?
REG
=
After Instruction
If REG
=
=
W;
PC
Address (EQUAL)
If REG
PC
≠
W;
=
Address (NEQUAL)
DS39609A-page 276
Advance Information
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
