PIC18FXX20
BNC
Branch if Not Carry
BNN
Branch if Not Negative
Syntax:
Operands:
Operation:
[ label ] BNC
-128 ≤ n ≤ 127
if carry bit is ’0’
n
Syntax:
Operands:
Operation:
[ label ] BNN
-128 ≤ n ≤ 127
if negative bit is ’0’
(PC) + 2 + 2n → PC
n
(PC) + 2 + 2n → PC
Status Affected:
Encoding:
None
1110
Status Affected:
Encoding:
None
1110
0011
nnnn
nnnn
0111
nnnn
nnnn
Description:
If the Carry bit is ‘0’, then the
program will branch.
Description:
If the Negative bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
Cycles:
1
1(2)
Words:
Cycles:
1
1(2)
Q Cycle Activity:
If Jump:
Q Cycle Activity:
If Jump:
Q1
Decode
Q2
Q3
Q4
Write to PC
Q1
Decode
Q2
Q3
Q4
Write to PC
Read literal
Process
Read literal
Process
'n'
Data
'n'
Data
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
If No Jump:
Q1
If No Jump:
Q1
Q2
Read literal
'n'
Q3
Process
Data
Q4
Q2
Read literal
'n'
Q3
Process
Data
Q4
Decode
No
Decode
No
operation
operation
HERE
BNC Jump
HERE
BNN Jump
Example:
Example:
Before Instruction
Before Instruction
PC
=
address (HERE)
PC
=
address (HERE)
After Instruction
After Instruction
If Carry
PC
=
=
=
=
0;
If Negative
PC
=
=
=
=
0;
address (Jump)
address (Jump)
If Carry
PC
1;
If Negative
PC
1;
address (HERE+2)
address (HERE+2)
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 269
MICROCHIP [ MICROCHIP ]
