PIC18FXX20
BCF
Bit Clear f
BN
Branch if Negative
[ label ] BN
Syntax:
[ label ] BCF f,b[,a]
Syntax:
n
Operands:
0 ≤ f ≤ 255
0 ≤ b ≤ 7
a ∈ [0,1]
0 → f<b>
None
Operands:
Operation:
-128 ≤ n ≤ 127
if negative bit is ’1’
(PC) + 2 + 2n → PC
Operation:
Status Affected:
Encoding:
Status Affected:
Encoding:
Description:
None
1110
0110
nnnn
nnnn
1001
bbba
ffff
ffff
If the Negative bit is ‘1’, then the
program will branch.
Description:
Bit 'b' in register 'f' is cleared. If ‘a’
is 0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
Cycles:
Words:
Cycles:
1
1(2)
Q Cycle Activity:
Q1
Q Cycle Activity:
Q2
Q3
Q4
Write
If Jump:
Decode
Read
Process
Q1
Q2
Q3
Q4
register 'f'
Data
register 'f'
Decode
Read literal
Process
Data
Write to PC
'n'
BCF
FLAG_REG, 7, 0
Example:
No
operation
No
operation
No
No
operation
Before Instruction
operation
FLAG_REG = 0xC7
If No Jump:
Q1
After Instruction
Q2
Read literal
'n'
Q3
Q4
No
operation
FLAG_REG = 0x47
Decode
Process
Data
HERE
BN Jump
Example:
Before Instruction
PC
=
address (HERE)
After Instruction
If Negative
PC
=
=
=
=
1;
address (Jump)
If Negative
PC
0;
address (HERE+2)
DS39609A-page 268
Advance Information
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
