PIC18CXX2
FIGURE 21-20: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
121
121
RC7/RX/DT
pin
120
122
Note: Refer to Figure 21-4 for load conditions.
TABLE 21-19: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param.
Symbol
Characteristic
Min
Max
Units Conditions
No.
120
TckH2dtV SYNC XMIT (MASTER & SLAVE)
Clock high to data out valid
PIC18CXXX
PIC18LCXXX
PIC18CXXX
PIC18LCXXX
PIC18CXXX
PIC18LCXXX
—
—
—
—
—
—
40
100
20
ns
ns
ns
ns
ns
ns
121
122
Tckrf
Tdtrf
Clock out rise time and fall time
(Master Mode)
50
Data out rise time and fall time
20
50
DS39026B-page 268
Preliminary
7/99 Microchip Technology Inc.