PIC18CXX2
Register 18-5: Configuration Register 3 High (CONFIG3H: Byte Address 300005h)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/P-1
CCP2MX
bit 0
—
—
—
—
—
—
—
bit 7
bit 7-1
bit 0
Reserved: Read as ’0’
CCP2MX: CCP2 Mux bit
1= CCP2 input/output is multiplexed with RC1
0= CCP2 input/output is multiplexed with RB3
Legend:
R = Readable bit
P = Programmable bit U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
- n = Value when device is unprogrammed
Register 18-6: Configuration Register 4 Low (CONFIG3H: Byte Address 300006h)
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/P-1
R/P-1
Reserved STVREN
bit 0
bit 7
bit 7-2
bit 1
Reserved: Read as ’0’
Reserved: Maintain this bit set.
bit 0
STVREN: Stack Full/Underflow Reset Enable bit
1= Stack Full/Underflow will cause reset
0= Stack Full/Underflow will not cause reset
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
- n = Value when device is unprogrammed
u = Unchanged from programmed state
DS39026B-page 184
Preliminary
7/99 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
