PIC18CXX2
18.2.2 WDT POSTSCALER
The WDT has a postscaler that can extend the WDT
reset period. The postscaler is selected at the time of
the device programming, by the value written to the
CONFIG2H configuration register.
FIGURE 18-1: WATCHDOG TIMER BLOCK DIAGRAM
WDT Timer
Postscaler
8
8 - to - 1 MUX
WDTPS2:WDTPS0
WDTEN
SWDTEN bit
Configuration bit
Note: WDPS2:WDPS0 are bits in a configuration register.
WDT
Time-out
FIGURE 18-2: SUMMARY OF WATCHDOG TIMER REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CONFIG2H
RCON
—
IPEN
—
—
LWRT
—
—
—
—
—
RI
—
WDTPS2 WDTPS2 WDTPS0
WDTEN
BOR
TO
—
PD
—
POR
—
WDTCON
SWDTEN
Legend: Shaded cells are not used by the Watchdog Timer.
DS39026B-page 186
Preliminary
7/99 Microchip Technology Inc.