PIC18F6525/6621/8525/8621
TABLE 4-2:
SPECIAL FUNCTION REGISTER MAP
Address
FFFh
FFEh
FFDh
FFCh
FFBh
FFAh
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FF0h
FEFh
Name
TOSU
Address
FDFh
Name
INDF2(3)
Address
FBFh
FBEh
Name
Address
F9Fh
Name
IPR1
PIR1
PIE1
CCPR1H
CCPR1L
TOSH
FDEh POSTINC2(3)
FDDh POSTDEC2(3)
FDCh PREINC2(3)
FDBh PLUSW2(3)
F9Eh
TOSL
FBDh CCP1CON
F9Dh
F9Ch MEMCON(2)
STKPTR
PCLATU
PCLATH
PCL
FBCh
FBBh
CCPR2H
CCPR2L
(1)
F9Bh
F9Ah
F99h
F98h
F97h
F96h
F95h
F94h
F93h
F92h
F91h
F90h
F8Fh
F8Eh
F8Dh
F8Ch
F8Bh
F8Ah
F89h
—
FDAh
FD9h
FD8h
FD7h
FD6h
FD5h
FD4h
FD3h
FD2h
FD1h
FD0h
FCFh
FCEh
FCDh
FCCh
FCBh
FCAh
FC9h
FC8h
FC7h
FC6h
FC5h
FC4h
FC3h
FC2h
FC1h
FC0h
FSR2H
FSR2L
FBAh CCP2CON
TRISJ(2)
TRISH(2)
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
LATJ(2)
LATH(2)
LATG
FB9h
FB8h
CCPR3H
CCPR3L
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0(3)
STATUS
TMR0H
TMR0L
T0CON
FB7h CCP3CON
FB6h ECCP1AS
FB5h CVRCON
(1)
—
FB4h
FB3h
FB2h
FB1h
FB0h PSPCON(4)
FAFh SPBRG1
FAEh RCREG1
CMCON
TMR3H
TMR3L
T3CON
OSCCON
LVDCON
WDTCON
RCON
TMR1H
FEEh POSTINC0(3)
FEDh POSTDEC0(3)
FECh PREINC0(3)
FEBh PLUSW0(3)
TMR1L
LATF
T1CON
FADh
FACh
FABh
TXREG1
TXSTA1
RCSTA1
LATE
TMR2
LATD
PR2
LATC
FEAh
FE9h
FE8h
FE7h
FE6h POSTINC1(3)
FE5h POSTDEC1(3)
FE4h PREINC1(3)
FE3h PLUSW1(3)
FSR0H
FSR0L
WREG
INDF1(3)
T2CON
FAAh EEADRH
LATB
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
FA9h
FA8h
FA7h
FA6h
FA5h
FA4h
FA3h
FA2h
FA1h
FA0h
EEADR
EEDATA
EECON2
EECON1
IPR3
LATA
F88h PORTJ(2)
F87h PORTH(2)
F86h
F85h
F84h
F83h
F82h
F81h
F80h
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
PIR3
PIE3
FE2h
FE1h
FE0h
FSR1H
FSR1L
BSR
IPR2
PIR2
PIE2
Note 1: Unimplemented registers are read as ‘0’.
2: This register is not available on PIC18F6525/6621 devices and reads as ‘0’.
3: This is not a physical register.
4: Enabled only in Microcontroller mode for PIC18F8525/8621 devices.
2005 Microchip Technology Inc.
DS39612B-page 49
MICROCHIP [ MICROCHIP ]
