PIC18F2331/2431/4331/4431
TABLE 11-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Reset Values
on Page:
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTA
LATA
RA7(1)
LATA7(1)
RA6(1)
RA5
RA4
RA3
RA2
RA1
RA0
57
57
57
56
56
56
LATA6(1) LATA Data Output Register
TRISA
TRISA7(1) TRISA6(1) PORTA Data Direction Register
ADCON1
ANSEL0
ANSEL1
VCFG1
ANS7(2)
—
VCFG0
ANS6(2)
—
—
ANS5(2)
—
FIFOEN BFEMT BFOVFL ADPNT1 ADPNT0
ANS4
—
ANS3
—
ANS2
—
ANS1
—
ANS0
ANS8(2)
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1: RA<7:6> and their associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.
2: ANS5 through ANS8 are available only on the PIC18F4331/4431 devices.
2010 Microchip Technology Inc.
DS39616D-page 115
MICROCHIP [ MICROCHIP ]
