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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
External interrupts, IN0, INT1 and INT2, are placed on  
RC3, RC4 and RC5 pins, respectively.  
11.3 PORTC, TRISC and LATC  
Registers  
SSP alternate interface pins, SDI/SDA, SCK/SCL and  
SDO are placed on RC4, RC5 and RC7 pins,  
respectively.  
PORTC is an 8-bit wide, bidirectional port. The corre-  
sponding Data Direction register is TRISC. Setting a  
TRISC bit (= 1) will make the corresponding PORTC  
pin an input (i.e., put the corresponding output driver in  
a high-impedance mode). Clearing a TRISC bit (= 0)  
will make the corresponding PORTC pin an output (i.e.,  
put the contents of the output latch on the selected pin).  
These pins are multiplexed on PORTC and PORTD by  
using the SSPMX bit in the CONFIG3L register.  
EUSART pins RX/DT and TX/CK are placed on RC7  
and RC6 pins, respectively.  
The Data Latch register (LATC) is also memory  
mapped. Read-modify-write operations on the LATC  
register read and write the latched output value for  
PORTC.  
The alternate Timer5 external clock input, T5CKI, and  
the alternate TMR0 external clock input, T0CKI, are  
placed on RC3 and are multiplexed with the PORTD  
(RD0) pin using the EXCLKMX Configuration bit in  
CONFIG3H. Fault inputs to the 14-bit PWM module,  
FLTA and FLTB, are located on RC1 and RC2. FLTA  
input on RC1 is multiplexed with RD4 using the  
FLTAMX bit.  
PORTC is multiplexed with several peripheral functions  
(Table 11-5). The pins have Schmitt Trigger input  
buffers.  
When enabling peripheral functions, care should be  
taken in defining TRIS bits for each PORTC pin. Some  
peripherals override the TRIS bit to make a pin an output,  
while other peripherals override the TRIS bit to make a  
pin an input. The user should refer to the corresponding  
peripheral section for the correct TRIS bit settings.  
The contents of the TRISC register are affected by  
peripheral overrides. Reading TRISC always returns  
the current contents, even though a peripheral device  
may be overriding one or more of the pins.  
EXAMPLE 11-3:  
INITIALIZING PORTC  
Note: On a Power-on Reset, these pins are  
CLRF  
PORTC  
; Initialize PORTC by  
; clearing output  
; data latches  
; Alternate method  
; to clear output  
; data latches  
; Value used to  
; initialize data  
; direction  
configured as digital inputs.  
The contents of the TRISC register are affected by  
peripheral overrides. Reading TRISC always returns  
the current contents, even though a peripheral device  
may be overriding one or more of the pins.  
CLRF  
LATC  
MOVLW  
MOVWF  
0xCF  
TRISC  
; Set RC<3:0> as inputs  
; RC<5:4> as outputs  
; RC<7:6> as inputs  
2010 Microchip Technology Inc.  
DS39616D-page 119  
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