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PIC16C71-04/SO 参数 Datasheet PDF下载

PIC16C71-04/SO图片预览
型号: PIC16C71-04/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 8位CMOS微控制器与A / D转换器 [8-Bit CMOS Microcontrollers with A/D Converter]
分类和应用: 转换器微控制器
文件页数/大小: 176 页 / 1596 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16C71X  
TABLE 4-2:  
PIC16C715 SPECIAL FUNCTION REGISTER SUMMARY  
Value on: Value on all  
Address Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
POR,  
BOR, PER  
other resets  
(3)  
Bank 0  
00h(1)  
01h  
INDF  
TMR0  
PCL  
Addressing this location uses contents of FSR to address data memory (not a physical register)  
Timer0 module’s register  
0000 0000 0000 0000  
xxxx xxxx uuuu uuuu  
0000 0000 0000 0000  
0001 1xxx 000q quuu  
xxxx xxxx uuuu uuuu  
---x 0000 ---u 0000  
xxxx xxxx uuuu uuuu  
02h(1)  
03h(1)  
04h(1)  
05h  
Program Counter's (PC) Least Significant Byte  
STATUS  
FSR  
IRP(4)  
Indirect data memory address pointer  
PORTA Data Latch when written: PORTA pins when read  
RP1(4)  
RP0  
TO  
PD  
Z
DC  
C
PORTA  
PORTB  
06h  
PORTB Data Latch when written: PORTB pins when read  
07h  
Unimplemented  
Unimplemented  
Unimplemented  
08h  
09h  
0Ah(1,2) PCLATH  
GIE  
T0IE  
Write Buffer for the upper 5 bits of the Program Counter  
---0 0000 ---0 0000  
0000 000x 0000 000u  
-0-- ---- -0-- ----  
0Bh(1)  
0Ch  
0Dh  
0Eh  
0Fh  
10h  
11h  
12h  
13h  
14h  
15h  
16h  
17h  
18h  
19h  
1Ah  
1Bh  
1Ch  
1Dh  
1Eh  
1Fh  
INTCON  
PEIE  
ADIF  
INTE  
RBIE  
T0IF  
INTF  
RBIF  
PIR1  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
A/D Result Register  
ADRES  
ADCON0  
xxxx xxxx uuuu uuuu  
0000 00-0 0000 00-0  
ADCS1  
ADCS0  
CHS2  
CHS1  
CHS0  
GO/DONE  
ADON  
Legend: x= unknown, u= unchanged, q= value depends on condition, - = unimplemented read as '0'.  
Shaded locations are unimplemented, read as ‘0’.  
Note 1: These registers can be addressed from either bank.  
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose  
contents are transferred to the upper byte of the program counter.  
3: Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.  
4: The IRP and RP1 bits are reserved on the PIC16C715, always maintain these bits clear.  
1997 Microchip Technology Inc.  
DS30272A-page 15  
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