欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC16C71-04/SO 参数 Datasheet PDF下载

PIC16C71-04/SO图片预览
型号: PIC16C71-04/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 8位CMOS微控制器与A / D转换器 [8-Bit CMOS Microcontrollers with A/D Converter]
分类和应用: 转换器微控制器
文件页数/大小: 176 页 / 1596 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC16C71-04/SO的Datasheet PDF文件第12页浏览型号PIC16C71-04/SO的Datasheet PDF文件第13页浏览型号PIC16C71-04/SO的Datasheet PDF文件第14页浏览型号PIC16C71-04/SO的Datasheet PDF文件第15页浏览型号PIC16C71-04/SO的Datasheet PDF文件第17页浏览型号PIC16C71-04/SO的Datasheet PDF文件第18页浏览型号PIC16C71-04/SO的Datasheet PDF文件第19页浏览型号PIC16C71-04/SO的Datasheet PDF文件第20页  
PIC16C71X  
TABLE 4-2:  
Address Name  
Bank 1  
PIC16C715 SPECIAL FUNCTION REGISTER SUMMARY (Cont.d)  
Value on: Value on all  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
POR,  
other resets  
(3)  
BOR, PER  
80h(1)  
81h  
INDF  
OPTION  
PCL  
Addressing this location uses contents of FSR to address data memory (not a physical register)  
0000 0000 0000 0000  
1111 1111 1111 1111  
0000 0000 0000 0000  
0001 1xxx 000q quuu  
xxxx xxxx uuuu uuuu  
--11 1111 --11 1111  
1111 1111 1111 1111  
RBPU  
Program Counter's (PC) Least Significant Byte  
IRP(4) RP1(4)  
RP0 TO  
Indirect data memory address pointer  
PORTA Data Direction Register  
INTEDG  
T0CS  
T0SE  
PSA  
PS2  
PS1  
PS0  
82h(1)  
83h(1)  
84h(1)  
85h  
STATUS  
FSR  
PD  
Z
DC  
C
TRISA  
TRISB  
86h  
PORTB Data Direction Register  
Unimplemented  
87h  
88h  
Unimplemented  
89h  
Unimplemented  
8Ah(1,2) PCLATH  
GIE  
T0IE  
Write Buffer for the upper 5 bits of the PC  
---0 0000 ---0 0000  
0000 000x 0000 000u  
-0-- ---- -0-- ----  
8Bh(1)  
8Ch  
8Dh  
8Eh  
8Fh  
90h  
91h  
92h  
93h  
94h  
95h  
96h  
97h  
98h  
99h  
9Ah  
9Bh  
9Ch  
9Dh  
9Eh  
9Fh  
INTCON  
PEIE  
ADIE  
INTE  
RBIE  
T0IF  
INTF  
RBIF  
PIE1  
Unimplemented  
MPEEN  
PCON  
PER  
POR  
BOR  
u--- -1qq u--- -1uu  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
ADCON1  
PCFG1  
PCFG0  
---- --00 ---- --00  
Legend: x= unknown, u= unchanged, q= value depends on condition, - = unimplemented read as '0'.  
Shaded locations are unimplemented, read as ‘0’.  
Note 1: These registers can be addressed from either bank.  
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose  
contents are transferred to the upper byte of the program counter.  
3: Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.  
4: The IRP and RP1 bits are reserved on the PIC16C715, always maintain these bits clear.  
DS30272A-page 16  
1997 Microchip Technology Inc.  
 复制成功!