PIC16F716
FIGURE 3-10:
BLOCK DIAGRAM OF RB7/P1D PIN
VDD
weak
RBPU(1)
PWMD(P1D) Enable
VDD
P
pull-up
PWMD(P1D) Data out
PWMD(P1D) Auto-shutdown tri-state
1
0
RB7/P1D
Data Latch
DATA BUS
D
Q
WR PORTB
WR TRISB
CK
TRIS Latch
VSS
D
Q
TTL
Buffer
Q
ST
Buffer
CK
RD TRISB
Latch
Q
D
EN
Q1
RD PORTB
Set RBIF
Q
D
From other
Note 1: To enable weak pull-ups,
set the appropriate TRIS
RB<7:4> pins
RD PORTB
Q3
EN
bit(s) and clear the RBPU
bit of the OPTION register.
ICSPD – In-Circuit Serial Programming™ Data Input
TABLE 3-2:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Value on
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
Resets
PORTB
TRISB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx uuuu uuuu
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 1111 1111
OPTION_REG RBPU INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111 1111 1111
Legend: x= unknown, u= unchanged. Shaded cells are not used by PORTB.
© 2007 Microchip Technology Inc.
DS41206B-page 25
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