PIC16F716
FIGURE 3-4:
BLOCK DIAGRAM OF RB1/T1OSO/T1CKI PIN
VDD
weak
RBPU(1)
T1OSCEN
P
pull-up
VDD
Data Latch
DATA BUS
RB1/T1OSO/T1CKI
D
Q
Q
WR PORTB
CK
TRIS Latch
VSS
D
Q
Q
WR TRISB
CK
RD TRISB
T1OSCEN
TTL Buffer
Q
D
EN
RD PORTB
T1OSI (From RB2)
TMR1 oscillator
To Timer1 clock input
ST Buffer
Note 1:
To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register).
FIGURE 3-5:
BLOCK DIAGRAM OF RB2/T1OSI PIN
VDD
RBPU(1)
T1OSCEN
weak
P
VDD
pull-up
Data Latch
DATA BUS
D
Q
Q
RB2/T1OSI
WR PORTB
CK
TRIS Latch
D
Q
VSS
WR TRISB
Q
CK
RD TRIS
T1OSCEN
TTL Buffer
Q
D
EN
RD PORTB
TMR1
Oscillator
T1OSO (To RB1)
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register).
DS41206B-page 22
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
