PIC16F716
FIGURE 3-8:
BLOCK DIAGRAM OF RB5/P1B PIN
VDD
weak
RBPU(1)
PWMB(P1B) Enable
VDD
P
pull-up
PWMB(P1B) Data out
PWMB(P1B) Auto-shutdown tri-state
1
0
RB5/P1B
Data Latch
DATA BUS
D
Q
WR PORTB
WR TRISB
CK
TRIS Latch
VSS
D
Q
TTL
Buffer
Q
CK
RD TRISB
Latch
Q
D
EN
Q1
RD PORTB
Set RBIF
Q
D
From other
RB<7:4> pins
RD PORTB
Q3
EN
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register).
FIGURE 3-9:
BLOCK DIAGRAM OF RB6/P1C PIN
VDD
RBPU(1)
weak
PWMC(P1C) Enable
VDD
P
pull-up
PWMC(P1C) Data out
PWMC(P1C) Auto-shutdown tri-state
1
0
RB6/P1C
Data Latch
DATA BUS
D
Q
WR PORTB
WR TRISB
CK
TRIS Latch
VSS
D
Q
TTL
Buffer
Q
CK
ST
Buffer
RD TRISB
Latch
Q
D
EN
RD PORTB
Q1
Set RBIF
Q
D
From other
RB<7:4> pins
RD PORTB
Q3
EN
ICSPC – In-Circuit Serial Programming™ Clock Input
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register).
DS41206B-page 24
© 2007 Microchip Technology Inc.