PIC16F716
EXAMPLE 3-1:
INITIALIZING PORTA
3.0
I/O PORTS
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
BCF
CLRF
STATUS, RP0
PORTA
;
;Initialize PORTA by
;clearing output
;data latches
BSF
STATUS, RP0 ;Select Bank 1
MOVLW 0xEF
;Value used to
;initialize data
;direction
;Set RA<3:0> as inputs
;RA<4> as outputs
3.1
PORTA and the TRISA Register
PORTA is
a 5-bit wide bidirectional port. The
MOVWF TRISA
corresponding data direction register is TRISA. Setting
a TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in
a High-impedance mode). Clearing a TRISA bit (= 0)
will make the corresponding PORTA pin an output (i.e.,
put the contents of the output latch on the selected pin).
BCF
STATUS, RP0 ;Return to Bank 0
FIGURE 3-1:
BLOCK DIAGRAM OF
RA<3:0>
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the PORT latch.
All write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, the value is modified and then written to the
PORT data latch.
DATA
BUS
D
Q
Q
VDD
VDD
WR
PORT
CK
P
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The RA4/T0CKI
pin is a Schmitt Trigger input and an open drain output.
All other RA port pins have TTL input levels and full
CMOS output drivers.
Data Latch
I/O pin
N
D
Q
WR
VSS
VSS
TRIS
CK
Q
PORTA pins, RA<3:0>, are multiplexed with analog
inputs and analog VREF input. The operation of each
pin is selected by clearing/setting the control bits in the
ADCON1 register (A/D Control Register 1).
Analog
Input
mode
TRIS Latch
Note:
On a Power-on Reset, these pins are
configured as analog inputs and read as
‘0’.
RD TRIS
Q
TTL
Input
Buffer
D
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EN
RD PORT
Note:
Setting RA3:0 to output while in Analog
mode will force pins to output contents of
data latch.
To A/D Converter
© 2007 Microchip Technology Inc.
DS41206B-page 19
MICROCHIP [ MICROCHIP ]
