PIC16F/LF1946/47
TABLE 18-2: SUMMARY OF REGISTERS ASSOCIATED WITH SR LATCH MODULE
Register
on Page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ANSELA
SRCON0
SRCON1
TRISA
—
—
ANSA5
ANSA4
ANSA3
ANSA2
ANSA1
SRPS
ANSA0
SRPR
125
183
184
124
SRLEN
SRSPE
TRISA7
SRCLK<2:0>
SRQEN SRNQEN
SRSCKE SRSC2E SRSC1E SRRPE SRRCKE SRRC2E SRRC1E
TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
Legend: — = unimplemented location, read as ‘0’. Shaded cells are unused by the SR Latch module.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 185