MCP23018/MCP23S18
1.6.5
INTERRUPT CONTROL REGISTER
The INTCON register controls how the associated pin
value is compared for the interrupt-on-change feature.
If a bit is set, the corresponding I/O pin is compared
against the associated bit in the DEFVAL register. If a
bit value is clear, the corresponding I/O pin is compared
against the previous value.
REGISTER 1-7:
INTCON – INTERRUPT-ON-CHANGE CONTROL REGISTER
R/W-0
IOC7
R/W-0
IOC6
R/W-0
IOC5
R/W-0
IOC4
R/W-0
IOC3
R/W-0
IOC2
R/W-0
IOC1
R/W-0
IOC0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-0
IOC7:IOC0: Controls how the associated pin value is compared for interrupt-on-change <7:0>.
1= Pin value is compared against the associated bit is DEFVAL register
0= Pin value is compared against the previous pin value.
Refer to INTCON and GPINTEN.
DS22103A-page 22
© 2008 Microchip Technology Inc.
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