MCP23018/MCP23S18
1.6.3
INTERRUPT-ON-CHANGE
CONTROL REGISTER
The GPINTEN register controls the interrupt-on-
change feature for each pin.
If a bit is set, the corresponding pin is enabled for
interrupt-on-change. The DEFVAL and INTCON
registers must also be configured if any pins are
enabled for interrupt-on-change.
REGISTER 1-5:
GPINTEN – INTERRUPT-ON-CHANGE PINS
R/W-0
GPINT7
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
GPINT6
GPINT5
GPINT4
GPINT3
GPINT2
GPINT1
GPINT0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-0
GPINT7:GPINT0: General purpose I/O interrupt-on-change pins <7:0>
1= Enable GPIO input pin for interrupt-on-change event
0= Disable GPIO input pin for interrupt-on-change event.
DS22103A-page 20
© 2008 Microchip Technology Inc.
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