MCP23018/MCP23S18
1.6.4
DEFAULT COMPARE REGISTER
FOR INTERRUPT-ON-CHANGE
The default comparison value is configured in the
DEFVAL register. If enabled (via GPINTEN and INT-
CON) to compare against the DEFVAL register, an
opposite value on the associated pin will cause an
interrupt to occur.
REGISTER 1-6:
DEFVAL – DEFAULT VALUE REGISTER
R/W-0
DEF7
R/W-0
DEF6
R/W-0
DEF5
R/W-0
DEF4
R/W-0
DEF3
R/W-0
DEF2
R/W-0
DEF1
R/W-0
DEF0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-0
DEF7:DEF0: Sets the compare value for pins configured for interrupt-on-change from defaults <7:0>.
Refer to INTCON.
If the associated pin level is the opposite from the register bit, an interrupt occurs.
Refer to INTCON and GPINTEN.
© 2008 Microchip Technology Inc.
DS22103A-page 21