17.6.1 LIN Control Register - LINCR
Bit
7
6
5
4
3
LENA
R/W
0
2
LCMD2
R/W
0
1
LCMD1
R/W
0
0
LCMD0
R/W
0
LSWRES LIN13
LCONF1 LCONF0
LINCR
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
• Bit 7 - LSWRES: Software Reset
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0 = No action,
1 = Software reset (this bit is self-reset at the end of the reset procedure).
• Bit 6 - LIN13: LIN 1.3 mode
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0 = LIN 2.1 (default),
1 = LIN 1.3.
• Bit 5:4 - LCONF[1:0]: Configuration
a. LIN mode (default = 00):
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00 = LIN standard configuration (listen mode “off”, CRC “on” and Frame_Time_Out “on”,
01 = No CRC, no time out (listen mode “off”),
10 = No Frame_Time_Out (listen mode “off” and CRC “on”),
11 = Listening mode (CRC “on” and Frame_Time_Out “on”).
b. UART mode (default = 00):
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00 = 8-bit, no parity (listen mode “off”),
01 = 8-bit, even parity (listen mode “off”),
10 = 8-bit, odd parity (listen mode “off”),
11 = Listening mode, 8-bit, no parity.
• Bit 3 - LENA: Enable
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●
0 = Disable (both LIN and UART modes),
1 = Enable (both LIN and UART modes).
• Bit 2:0 - LCMD[2..0]: Command and mode
The command is only available if LENA is set.
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000 = LIN Rx Header - LIN abort,
001 = LIN Tx Header,
010 = LIN Rx Response,
011 = LIN Tx Response,
100 = UART Rx and Tx Byte disable,
11x = UART Rx Byte enable,
1x1 = UART Tx Byte enable.
ATmega16/32/64/M1/C1 [DATASHEET]
191
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
