17.6.3 LIN Enable Interrupt Register - LINENIR
Bit
7
-
6
-
5
-
4
-
3
2
1
0
LENERR LENIDOK LENTXOK LENRXOK LINENIR
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R/W
0
R/W
0
R/W
0
R/W
0
• Bits 7:4 - Reserved Bits
These bits are reserved for future use. For compatibility with future devices, they must be written to zero when LINE-
NIR is written.
• Bit 3 - LENERR: Enable Error Interrupt
●
●
0 = Error interrupt masked,
1 = Error interrupt enabled.
• Bit 2 - LENIDOK: Enable Identifier Interrupt
●
●
0 = Identifier interrupt masked,
1 = Identifier interrupt enabled.
• Bit 1 - LENTXOK: Enable Transmit Performed Interrupt
●
●
0 = Transmit performed interrupt masked,
1 = Transmit performed interrupt enabled.
• Bit 0 - LENRXOK: Enable Receive Performed Interrupt
●
●
0 = Receive performed interrupt masked,
1 = Receive performed interrupt enabled.
17.6.4 LIN Error Register - LINERR
Bit
7
6
5
4
3
2
1
0
LABORT LTOERR LOVERR LFERR
LSERR
LPERR
LCERR
LBERR
LINERR
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
• Bit 7 - LABORT: Abort Flag
●
●
0 = No warning,
1 = LIN abort command occurred. This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 6 - LTOERR: Frame_Time_Out Error Flag
●
●
0 = No error,
1 = Frame_Time_Out error. This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 5 - LOVERR: Overrun Error Flag
●
●
0 = No error,
1 = Overrun error. This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 4 - LFERR: Framing Error Flag
●
●
0 = No error,
1 = Framing error. This bit is cleared when LERR bit in LINSIR is cleared.
ATmega16/32/64/M1/C1 [DATASHEET]
193
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
