17.5.11 Break-in-data
According to the LIN protocol, the LIN/UART controller can detect the BREAK/SYNC field sequence even if the break is
partially superimposed with a byte of the response. When a BREAK/SYNC field sequence happens, the transfer in progress
is aborted and the processing of the new frame starts.
●
On slave node(s), an error is generated (i.e. LBERR in case of Tx Response or LFERR in case of Rx Response).
Information on data error is also available, refer to the Section 17.5.7.5.
●
On master node, the user (code) is responsible for this aborting of frame. To do this, the master task has first to abort
the on-going communication (clearing LCMD bits - LIN Abort command) and then to apply the Tx Header command.
In this case, the abort error flag - LABORT - is set.
On the slave node, the BREAK detection is processed with the synchronization setting available when the LIN/UART
controller processed the (aborted) response. But the re-synchronization restarts as usual. Due to a possible difference of
timing reference between the BREAK field and the rest of the frame, the time-out values can be slightly inaccurate.
17.5.12 Checksum
The last field of a frame is the checksum.
In LIN 2.1, the checksum contains the inverted eight bit sum with carry over all data bytes and the protected identifier. This
calculation is called enhanced checksum.
n
n
CHECKSUM = 255 – unsigned char
DATA
+ PROTECTED ID. + unsigned char
DATA
+ PROTECTED ID. » 8
n
n
0
0
In LIN 1.3, the checksum contains the inverted eight bit sum with carry over all data bytes. This calculation is called classic
checksum.
n
n
CHECKSUM = 255 – unsigned char
DATA
+ unsigned char
DATA
» 8
n
n
0
0
Frame identifiers 60 (0x3C) to 61 (0x3D) shall always use classic checksum
17.5.13 Interrupts
As shown in Figure 17-13 on page 188, the four communication flags of the LINSIR register are combined to drive two
interrupts. Each of these flags have their respective enable interrupt bit in LINENIR register.
(see Section 17.5.8 “xxOK Flags” on page 186 and Section 17.5.9 “xxERR Flags” on page 186).
Figure 17-13. LIN Interrupt Mapping
LINERR.7
LABORT
LINERR.6
LTOERR
LINERR.5
LOVERR
LINERR.4
LINSIR.3
LFERR
LERR
LIN ERR
LINERR.3
LINERR.2
LINERR.1
LINERR.0
LSERR
LPERR
LCERR
LBERR
LINENIR.3
LENERR
LINENIR.2
LENIDOK
LINENIR.1
LENTXOK
LINENIR.0
LENRXOK
LINSIR.2
LINSIR.1
LINSIR.0
LIDOK
LTXOK
LRXOK
LIN IT
188
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
