• Bit 4 – POEN2A: PSC Output 2A Enable
When this bit is clear, I/O pin affected to PSCOUT2A acts as a standard port.
When this bit is set, I/O pin affected to PSCOUT2A is connected to the PSC module 2 waveform generator A output and is
set and clear according to the PSC operation.
• Bit 3 – POEN1B: PSC Output 1B Enable
When this bit is clear, I/O pin affected to PSCOUT1B acts as a standard port.
When this bit is set, I/O pin affected to PSCOUT1B is connected to the PSC module 1 waveform generator B output and is
set and clear according to the PSC operation.
• Bit 2 – POEN1A: PSC Output 1A Enable
When this bit is clear, I/O pin affected to PSCOUT1A acts as a standard port.
When this bit is set, I/O pin affected to PSCOUT1A is connected to the PSC module 1 waveform generator A output and is
set and clear according to the PSC operation.
• Bit 1 – POEN0B: PSC Output 0B Enable
When this bit is clear, I/O pin affected to PSCOUT0B acts as a standard port.
When this bit is set, I/O pin affected to PSCOUT0B is connected to the PSC module 0 waveform generator B output and is
set and clear according to the PSC operation.
• Bit 0 – POEN0A: PSC Output 0A Enable
When this bit is clear, I/O pin affected to PSCOUT0A acts as a standard port.
When this bit is set, I/O pin affected to PSCOUT0A is connected to the PSC module 0 waveform generator A output and is
set and clear according to the PSC operation.
14.16.2 PSC Synchro Configuration – PSYNC
Bit
7
-
6
-
5
4
3
2
1
0
PSYNC21 PSYNC20 PSYNC11 PSYNC10 PSYNC01 PSYNC00 PSYNC
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
• Bit 7 – not use
not use
• Bit 6 – not use
not use
• Bit 5:4 – PSYNC21:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module 2 to the ADC for synchronization
• Bit 3:2 – PSYNC11:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module 1 to the ADC for synchronization
• Bit 1:0 – PSYNC01:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module 0 to the ADC for synchronization.
Table 14-8. Synchronization Source Description in One Ramp Mode
PSYNCn1
PSYNCn0
Description
0
0
Send signal on leading edge of PSCOUTnA(match with OCRnSA)
Send signal on trailing edge of PSCOUTnA(match with OCRnRA or fault/retrigger on
part A)
0
1
1
1
0
1
Send signal on leading edge of PSCOUTnB (match with OCRnSB)
Send signal on trailing edge of PSCOUTnB (match with OCRnRB or fault/retrigger on
part B)
128
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15