• Bit 4:3:2 – SWAPn: SWAP Funtion Select (not implemented in ATmega32M1 up to revision C)
When this bit is set; the channels PSCOUTnA and PSCOUTnB are exchanged. This allows to invert the waveforms of both
channels at one time.
• Bit 1 – PCCYC: PSC Complete Cycle
When this bit is set, the PSC completes the entire waveform cycle before halt operation requested by clearing PRUN.
• Bit 0 – PRUN: PSC Run
Writing this bit to one starts the PSC.
14.16.9 PSC Module n Input Control Register – PMICn
Bit
7
6
5
4
3
2
1
0
POVENn PISELn PELEVn PFLTEn PAOCn PRFMn2 PRFMn1 PRFMn0
PMICn
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
The input control registers are used to configure the 2 PSC’s Retrigger/Fault block A and B. The 2 blocks are identical, so
they are configured on the same way.
• Bit 7 – POVENn: PSC Module n Overlap Enable
Set this bit to disactivate the overlap protection. See Section 14.7 “Overlap Protection” on page 122.
• Bit 6 – PISELn: PSC Module n Input Select
Clear this bit to select PSCINn as module n input.
Set this bit to select comparator n output as module n input.
• Bit 5 –PELEVn: PSC Module n Input Level Selector
When this bit is clear, the low level of selected input generates the significative event for fault function.
When this bit is set, the high level of selected input generates the significative event for fault function.
• Bit 4 – PFLTEn: PSC Module n Input Filter Enable
Setting this bit (to one) activates the input noise canceler. When the noise canceler is activated, the input from the input pin
is filtered. The filter function requires four successive equal valued samples of the input pin for changing its output. The input
is therefore delayed by four oscillator cycles when the noise canceler is enabled.
• Bit 3 – PAOCn: PSC Module n 0 Asynchronous Output Control
When this bit is clear, fault input can act directly to PSC module n outputs A and B. See Section 14.9.1 “PSC Input
Configuration” on page 124.
• Bit 2:0 – PRFMn2:0: PSC Module n Input Mode
These three bits define the mode of operation of the PSC inputs.
Table 14-12. Input Mode Operation
PRFMn2:0
000b
Description
No action, PSC input is ignored
Disactivate module n outputs A
Disactivate module n output B
Disactivate module n output A and B
Disactivate all PSC output
001b
010b
011b
10x
11xb
Halt PSC and wait for software action
ATmega16/32/64/M1/C1 [DATASHEET]
131
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
