PIC12CE67X
TABLE 5-1:
SUMMARY OF PORT REGISTERS
Value on
Power-on
Reset
Value on
all other
Resets
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 Bit 2 Bit 1 Bit 0
85h
81h
03h
05h
TRIS
—
—
GPIO Data Direction Register
--11 1111
1111 1111
0001 1xxx
11xx xxxx
--11 1111
1111 1111
000q quuu
11uu uuuu
OPTION
STATUS
GPIO
GPPU
IRP(1)
SCL
INTEDG
RP1(1)
SDA
T0CS
RP0
T0SE
TO
PSA
PD
PS2
Z
PS1
DC
PS0
C
GP5
GP4
GP3
GP2
GP1 GP0
Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as '0', x= unknown, u= unchanged,
q = see tables in Section 9.4 for possible values.
Note 1: The IRP and RP1 bits are reserved on the PIC12CE67X, always maintain these bits clear.
Example 5-1 shows the effect of two sequential read-
modify-write instructions on an I/O port.
5.4
I/O Programming Considerations
5.4.1
BI-DIRECTIONAL I/O PORTS
EXAMPLE 5-1: READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
;Initial GPIO Settings
; GPIO<5:3> Inputs
; GPIO<2:0> Outputs
;
Any instruction which writes, operates internally as a
read followed by a write operation. The BCF and BSF
instructions, for example, read the register into the
CPU, execute the bit operation and write the result back
to the register. Caution must be used when these
instructions are applied to a port with both inputs and
outputs defined. For example, a BSFoperation on bit5
of GPIO will cause all eight bits of GPIO to be read into
the CPU. Then the BSF operation takes place on bit5
and GPIO is written to the output latches. If another bit
of GPIO is used as a bi-directional I/O pin (e.g., bit0)
and it is defined as an input at this time, the input signal
present on the pin itself would be read into the CPU
and rewritten to the data latch of this particular pin,
overwriting the previous content. As long as the pin
stays in the input mode, no problem occurs. However,
if bit0 is switched to an output, the content of the data
latch may now be unknown.
;
;
GPIO latch GPIO pins
---------- ----------
BCF
BCF
MOVLW 007h
TRIS GPIO
GPIO, 5
GPIO, 4
;--01 -ppp
;--10 -ppp
;
--11 pppp
--11 pppp
;--10 -ppp
--11 pppp
;
;Note that the user may have expected the pin
;values to be --00 pppp. The 2nd BCF caused
;GP5 to be latched as the pin value (High).
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage the
chip.
Reading the port register, reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(ex. BCF, BSF, etc.) on a port, the value of the port pins
is read, the desired operation is done to this value, and
this value is then written to the port latch.
FIGURE 5-2: SUCCESSIVE I/O OPERATION
Q4
Q4
Q4
Q1 Q2
Q4
Q3
Q3
Q3
Q3
Q1 Q2
PC
MOVWF GPIO
Q1 Q2
Q1 Q2
PC + 3
NOP
PC + 1
PC + 2
NOP
This example shows a write to GPIO followed
by a read from GPIO.
Instruction
fetched
MOVF GPIO,W
Data setup time = (0.25 TCY – TPD)
where: TCY = instruction cycle.
TPD = propagation delay
GP5:GP0
Port pin
written here
Port pin
sampled here
Therefore, at higher clock frequencies, a
write followed by a read may be problematic.
Instruction
executed
MOVWF GPIO
(Write to
MOVF GPIO,W
(Read
NOP
GPIO)
GPIO)
DS40181B-page 26
Preliminary
1998 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
