PIC12CE67X
4.5
Indirect Addressing, INDF and FSR
Registers
EXAMPLE 4-1: INDIRECT ADDRESSING
movlw 0x20
movwf FSR
;initialize pointer
;to RAM
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
NEXT
clrf
incf
INDF
;clear INDF register
FSR,F ;inc pointer
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = '0') will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-11. However, IRP
is not used in the PIC12CE67X.
btfss FSR,4 ;all done?
goto
NEXT
;no clear next
CONTINUE
:
;yes continue
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-1.
FIGURE 4-11: DIRECT/INDIRECT ADDRESSING
Direct Addressing
Indirect Addressing
(1)
(1)
from opcode
7
RP1 RP0
6
0
0
IRP
FSR register
bank select
180h
location select
bank select
location select
00
01
10
11
00h
not used
Data
Memory
7Fh
1FFh
Bank 0
Bank 1 Bank 2
Bank 3
For register file map detail see Figure 4-2.
Note 1: The RP1 and IRP bits are reserved, always maintain these bits clear.
1998 Microchip Technology Inc.
Preliminary
DS40181B-page 23
MICROCHIP [ MICROCHIP ]
