PIC12CE67X
EEPROM as part of a write operation. After the word
address is sent, the processor generates a start condi-
tion following the acknowledge. This terminates the
write operation, but not before the internal address
pointer is set. Then the processor issues the control
byte again but with the R/W bit set to a one. It will then
issue an acknowledge and transmits the eight bit data
word. The processor will not acknowledge the transfer
but does generate a stop condition and the EEPROM
discontinues transmission (Figure 6-7). After this com-
mand, the internal address counter will point to the
address location following the one that was just read.
6.5
READ OPERATIONS
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
EEPROM address is set to one. There are three basic
types of read operations: current address read, random
read, and sequential read.
6.5.1
CURRENT ADDRESS READ
It contains an address counter that maintains the
address of the last word accessed, internally incre-
mented by one. Therefore, if the previous read access
was to address n, the next current address read opera-
tion would access data from address n + 1. Upon
receipt of the EEPROM address with the R/W bit set to
one, the EEPROM issues an acknowledge and trans-
mits the eight bit data word. The processor will not
acknowledge the transfer but does generate a stop
condition and the EEPROM discontinues transmission
(Figure 6-6).
6.5.3
SEQUENTIAL READ
Sequential reads are initiated in the same way as a ran-
dom read except that after the device transmits the first
data byte, the processor issues an acknowledge as
opposed to a stop condition in a random read. This
directs the EEPROM to transmit the next sequentially
addressed 8-bit word (Figure 6-8).
To provide sequential reads, it contains an internal
address pointer which is incremented by one at the
completion of each read operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
6.5.2
RANDOM READ
Random read operations allow the processor to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set.This is done by sending the word address to the
FIGURE 6-6: CURRENT ADDRESS READ
S
T
S
BUS ACTIVITY
A
CONTROL
BYTE
T
PROCESSOR
R
O
P
T
SDA LINE
S 1 0 1 0 X X X 1
P
A
C
K
N
O
BUS ACTIVITY
DATA
A
C
K
X = Don’t Care Bit
FIGURE 6-7: RANDOM READ
S
T
A
R
T
S
T
A
R
T
S
T
O
P
BUS ACTIVITY
PROCESSOR
CONTROL
BYTE
WORD
ADDRESS (n)
CONTROL
BYTE
X X X X
P
S 1 0 1 0 X X X 0
S 1 0 1 0 X X X 1
SDA LINE
A
C
K
A
C
K
A
C
K
N
O
DATA (n)
BUS ACTIVITY
A
C
K
X = Don’t Care Bit
FIGURE 6-8: SEQUENTIAL READ
S
T
O
P
BUS ACTIVITY
PROCESSOR
CONTROL
BYTE
DATA n
DATA n + 1
DATA n + 2
DATA n + X
SDA LINE
P
A
C
K
A
C
K
A
C
K
A
C
K
N
O
BUS ACTIVITY
A
C
K
DS40181B-page 30
Preliminary
1998 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
