KSZ8795CLX
TABLE 4-22: TEMPORAL STORAGE FOR 14 BYTES ACL RULES (CONTINUED)
Address
Name
Description
Mode
Default
5 - 0
BYTE_ENB Byte Enable in ACL table; 14-Byte per entry
[13:8]
R/W
0
1 = Byte is selected for read/write
0 = Byte is not selected
Bit[0] of BYTE_ENB[13:0] is for byte address 0x0D
in ACL table entry,
Bit[1] of BYTE_ENB[13:0] is for byte address 0x0C
in ACL table entry, etc.
Bit[13] of BYTE_ENB[13:0] is for byte address
0x00 in ACL table entry.
Port_ACL_ BYTE_ENB_LSB
ACL Port Register 15 (0x11)
Reg. 110 (0x6E) Bits[7:5] = 010 for ACL, Reg. 110 Bits[3:0] = 0xn for Ports 1, 2, 3, 4, and 5.
Reg. 111 (0x6F) Bits[7:0] = Offset 0x11 to access the Indirect Byte Register 0xA0.
Location: (010 ACL) -> {0xn, offset} -> 0xA0 holds the data.
7 - 0
BYTE_ENB Byte Enable in ACL table; 14-Byte per entry
[7:0]
R/W
0x00
1 = Byte is selected for read/write
0 = Byte is not selected
Bit[0] of BYTE_ENB[13:0] is for byte address 0x0D
in ACL table entry,
Bit[1] of BYTE_ENB[13:0] is for byte address 0x0C
in ACL table entry, etc.
Bit[13] of BYTE_ENB[13:0] is for byte address
0x00 in ACL table entry.
TABLE 4-23: ACL READ/WRITE CONTROL
Address Name Description
Mode
Default
Port_ACL_ACCESS_CONTROL1
ACL Port Register 16 (0x12)
Reg. 110 (0x6E) Bits[7:5] = 010 for ACL, Reg. 110 Bits[3:0] = 0xn for Ports 1, 2, 3, 4, and 5.
Reg. 111 (0x6F) Bits[7:0] = Offset 0x12 to access the Indirect Byte Register 0xA0.
Location: (010 ACL) -> {0xn, offset} -> 0xA0 holds the data.
7
6
Reserved
—
RO
RO
0
1
WRITE_
STATUS
Write Operation Status
1 = Write completed
0 = Write is in progress
5
4
READ_
STATUS
Read Operation Status
RO
1
0
1 = Read completed
0 = Read is in progress
WRITE_
READ
Request Type
R/W
1 = Write
0 = Read
2016 Microchip Technology Inc.
DS00002112A-page 95
MICREL [ MICREL SEMICONDUCTOR ]
