W78M32VP-XBX
TABLE 39 – MEMORY ARRAY COMMAND DEFINITIONS
Bus Cycles (Note 1-5)
Command
First
Second
Third
Fouth
Fifth
Sixth
Addr
RA
Data
RD
F0
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read (6)
Reset (7)
1
1
4
4
4
4
1
4
3
1
3
3
2
2
2
2
6
6
1
1
3
4
XXX
555
555
555
555
55
Manufacturer ID
AA
AA
AA
AA
98
2AA
2AA
2AA
2AA
55
55
55
55
555
555
555
555
90
90
90
90
X00
X01
01
227E
(10)
(11)
Device ID (8)
X0E
(8)
X0F
(8)
Sector Protect Verify (10)
Secure Device Verify (11)
[SA]X02
X03
CFI Query (12)
Program
555
555
SA
AA
AA
29
2AA
2AA
55
55
555
SA
A0
25
PA
SA
PD
Write to Buffer
WC
WBL
PD
WBL
PD
Program Buffer to Flash (Confirm)
Write-to-Buffer-Abort Reset
Enter
555
555
XXX
XXX
XXX
XXX
555
555
XXX
XXX
555
555
AA
AA
A0
80
2AA
2AA
PA
55
55
PD
30
10
00
55
55
555
555
F0
20
Program (14)
Sector Erase (14)
SA
Chip Erase (14)
80
XXX
XXX
2AA
2AA
Reset (15)
90
Chip Erase
AA
AA
B0
30
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
Sector Erase
Erase Suspend/Program Suspend (16)
Erase Resume/Program Resume (17)
Secured Silicon Sector Entry
Secured SIlicon Sector Exit (18)
Legend
AA
AA
2AA
2AA
55
55
555
555
88
90
XX
00
X
= Don’t care
RA = Address of the memory to be read.
RD = Data read from location RA during read operation.
8. See Table 7.2 for device ID values and definitions.
9. The fourth, fifth, and sixth cycles of the autoselect command sequence are read cycles.
10. The data is 00h for an unprotected sector and 01h for a protected sector. See Autoselect for
more information. This is same as PPB Status Read except that the protect and unprotect
statuses are inverted here.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of
the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of the WE# or CE#
pulse, whichever happens first.
11. The data value for DQ7 is “1” for a serialized, protected Secured Silicon Sector region and “0”
for an unserialized, unprotected region. See data and definitions.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits Amax–A16
uniquely select any sector.
WBL = Write Buffer Location. The address must be within the same write buffer page as PA.
WC = Word Count is the number of write buffer locations to load minus 1.
12. Command is valid when device is ready to read array data or when device is in autoselect mode.
13. Command sequence returns device to reading array after being placed in a Write-to-Buffer-Abort
state. Full command sequence is required if resetting out of abort while in Unlock Bypass mode.
14. The Unlock-Bypass command is required prior to the Unlock-Bypass- Program command.
15. The Unlock-Bypass-Reset command is required to return to reading array data when the device
is in the unlock bypass mode.
Notes
1. See Table 7.1 for description of bus operations.
2. All values are in hexadecimal.
3. All bus cycles are write cycles unless otherwise noted.
4. Data bits DQ15-DQ8 are don’t cares for unlock and command cycles.
5. Address bits AMAX:A16 are don’t cares for unlock and command cycles, unless SA or PA
required. (AMAX is the Highest Address pin.).
16. The system can read and program/program suspend in non-erasing sectors, or enter the
autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid only
during a sector erase operation.
17. The Erase Resume/Program Resume command is valid only during the Erase Suspend/
Program Suspend modes.
18. The Exit command returns the device to reading the array.
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect
mode, or if DQ5 goes high (while the device is providing status data).
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2011 © 2011 Microsemi Corporation. All rights reserved.
Rev. 15
25
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
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