W3H32M64EA-XSBX
ADVANCED
EXTENDED MODE REGISTER (EMR)
The extended mode register controls functions beyond those
controlled by the mode register; these additional functions are
DLL enable/disable, output drive strength, on die termination
(ODT) (RTT), posted AL, off-chip driver impedance calibration
(OCD), DQS# enable/disable, RDQS/RDQS# enable/disable,
and output disable/enable. These functions are controlled via the
bits shown in Figure 7. The EMR is programmed via the LOAD
MODE (LM) command and will retain the stored information until it
is programmed again or the device loses power. Reprogramming
the EMR will not alter the contents of the memory array, provided
it is performed correctly.
The EMR must be loaded when all banks are idle and no bursts
are in progress, and the controller must wait the specified time tMRD
before initiating any subsequent operation. Violating either of these
requirements could result in unspecified operation.
FIGURE 7 – EXTENDED MODE REGISTER DEFINITION
1
2
BA2 BA1 BA0 An A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address bus
Extended mode
16 15 14
n
0
12 11 10
Out
9
8
7
6
RTT
5
4
3
2
1
0
register (Ex)
0
MRS
OCD Program
Posted CAS# RTT ODS DLL
RDQSDQS#
Outputs
Enabled
Disabled
E0
0
1
DLL Enable
Enable (normal)
Disable (test/debug)
E12
0
E6 E2 RTT(Nominal)
0
0
1
1
0
1
0
1
R
TTdisabled
1
75Ω
E11 RDQS Enable
150Ω
E1 Output Drive Strength
0
1
No
50Ω
0
1
Full
Yes
Reduced
3
E10 DQS# Enable
Posted CAS# Additive Latency (AL)
E5 E4 E3
0
1
Enable
Disable
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
2
4
E9 E8 E7 OCD Operation
3
0
0
0
1
1
0
0
1
0
1
0
1
0
0
1
OCD exit
Reserved
Reserved
Reserved
4
5
6
Reserved
Enable OCD defaults
Mode Register Set
Mode register (MR)
E15 E14
0
1
0
1
0
0
1
1
Extended mode register (EMR)
Extended mode register (EMR2)
Extended mode register (EMR3)
Notes:
1. E16 (BA2) is only applicable for densities ≥1Gb, reserved for future use, and must be programmed to “0.”
2. Mode bits (En) with corresponding address balls (An) greater than E12 (A12) are reserved for future use and must be programmed to “0.”
3. Not all listed AL options are supported.
4. During initialization of the OCD operation, all three bits must be set to “1” for the OCD default state, then set to “0” before initialization is finished.
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2011 © 2011 Microsemi Corporation. All rights reserved.
Rev.1
11
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
