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MDT10F630P11 参数 Datasheet PDF下载

MDT10F630P11图片预览
型号: MDT10F630P11
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-bit Micro-controller]
分类和应用: 微控制器
文件页数/大小: 19 页 / 231 K
品牌: MDTIC [ Micon Design Technology Corporation ]
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MDT10F630  
(27).  
8EH : Power control register.  
Bit 7  
-
Bit 6  
-
Bit 5  
-
Bit 4  
-
Bit 3  
-
Bit 2  
-
Bit 1  
Bit 0  
-
PSTA  
PORB  
PORB : Power On Reset Status Bit.  
0 = A power on reset occurred (must be set in software after a power on reset occurs)  
1 = No power on reset occurred  
(28).  
(29).  
8FH : Unimplemented register.  
90H : MCU oscillator control register.  
Bit 7  
-
Bit 6  
REG  
Bit 5  
REG  
Bit 4  
REG  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
INOSCR  
ECKIN  
OSO2E  
OSC2O  
OSCIN  
Bit6 ~ 4 : Normal register bits.  
ECKIN : External Clock Input Enable Bit.  
0 = Disable oscillator external clock input  
1 = Enable oscillator external clock input (must be set in external oscillator of RC mode )  
OSO2E : Both of Internal and external oscillator Enable Bit.  
0 = Only use internal oscillator or external oscillator  
1 = Internal and external (LF mode only) oscillator enable both  
OSC2O : OSC2/PA4 Oscillator Clock Output Enable Bit.  
0 = Disable OSC2/PA4 oscillator clock output in internal or external of RC mode oscillator  
1 = Enable OSC2/PA4 oscillator clock output in internal or external of RC mode oscillator  
OSCIN : MCU Internal Or external oscillator Select Bit.  
0 = Default the MCU clock based on internal 4MHz oscillator  
1 = The MCU clock based on external oscillator (type from option select),  
When internal 4MHz oscillator change to external oscillator must wait OST time 20ms.  
Example : change oscillator on external oscillator (oscillator type from option select)  
BSR  
STATUS, PAGE  
01H  
; Set page 1  
LDWI  
STWR  
BCR  
; Set W data is 01H  
; Store 01H to register 90H (INOSCR)  
; Set page 0  
10H  
STATUS, PAGE  
(30).  
(31).  
91 ~ 94H : Unimplemented register.  
95H : Port A pull_hi control register.  
Bit 7  
-
Bit 6  
-
Bit 5  
Bit 4  
Bit 3  
-
Bit 2  
Bit 1  
Bit 0  
PAPHR  
PAH5  
PHA4  
PHA2  
PHA1  
PHA0  
Bit 5-4 & Bit 2-0 : Port A Pull_hi Control Bits  
0 = Pull_hi disable  
1 = Pull_hi enable  
This specification is subject to be changed without notice. Please visit our web site for the most updated information.  
http://www.mdtic.com.tw P.10 2008/4 Ver. 1.0