MDT10F630
Bit
Symbol
Function
Prescaler assignment bit :
0 — PA2/INT
3
PSC
1 — Watchdog Timer
RTCC signal Edge :
4
5
6
7
TCE
TCS
0 — Increment on low-to-high transition on PA2 pin
1 — Increment on high-to-low transition on PA2 pin
RTCC signal set :
0 — Internal instruction cycle clock
1 — Transition on PA2/INT pin
PA2 interrupt edge select bit :
IES
0 — Interrupt on falling edge of PA2/INT pin
1 — Interrupt on rising edge of PA2/INT pin
Port A Pull-up Enable Bit :
0 — PA0~2 & PA4~5 pull-up all enable
1 — PA0~2 & PA4~5 pull-up all disable
/PAPH
(21).
85H : Port A input/output control register.
Bit 7
-
Bit 6
-
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CPIO A
CPIO PA5 CPIO PA4 CPIO PA3 CPIO PA2 CPIO PA1 CPIO PA0
(22).
(23).
86H : Unimplemented register.
87H : Port A input/output control register.
Bit 7
-
Bit 6
-
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CPIO C
CPIO PC5 CPIO PC4 CPIO PC3 CPIO PC2 CPIO PC1 CPIO PC0
(24).
(25).
88 ~ 89H : Unimplemented register.
8CH : Peripheral interrupt enable register.
Bit 7
EEIE
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
Bit 2
-
Bit 1
-
Bit 0
PIEB1
CMIE
TMR1IE
EEIE : EEPROM Write Operation Interrupt Enable Bit.
0 = Disable the EEPROM write complete interrupt
1 = Enable the EEPROM write complete interrupt
CMIE : Comparator Interrupt Enable Bit.
0 = Disable the comparator interrupt
1 = Enable the comparator interrupt
TMR1IE : TMR1 Overflow Interrupt Enable Bit.
0 = Disable the TMR1 overflow interrupt
1 = Enable the TMR1 overflow interrupt
(26).
8DH : Unimplemented register.
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw P.9 2008/4 Ver. 1.0