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MDT10F630P11 参数 Datasheet PDF下载

MDT10F630P11图片预览
型号: MDT10F630P11
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-bit Micro-controller]
分类和应用: 微控制器
文件页数/大小: 19 页 / 231 K
品牌: MDTIC [ Micon Design Technology Corporation ]
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MDT10F630  
Mnemonic  
Operands  
Function  
Instruction Code  
Operation  
Status  
STWR  
R
Store W to register  
Load register  
WR  
None  
010001 1rrrrrrr  
011000 trrrrrrr  
111010 iiiiiiii  
010111 trrrrrrr  
011001 trrrrrrr  
011010 trrrrrrr  
011011 trrrrrrr  
011100 trrrrrrr  
011101 trrrrrrr  
011110 trrrrrrr  
010010 trrrrrrr  
110100 iiiiiiii  
010011 trrrrrrr  
110101 iiiiiiii  
010100 trrrrrrr  
110110 iiiiiiii  
LDR R, t  
Rt  
Z
LDWI  
I
Load immediate to W  
Swap halves register  
Increment register  
IW  
None  
SWAPR R, t  
INCR R, t  
INCRSZ R, t  
ADDWR R, t  
SUBWR R, t  
DECR R, t  
[R(0~3) R(4~7)]t  
R + 1t  
None  
Z
Increment register, skip if zero R + 1t  
None  
Add W and register  
Subtract W from register  
Decrement register  
W + Rt  
C, HC, Z  
R Wt (R+/W+1t)  
R 1t  
C, HC, Z  
Z
R 1t  
DECRSZ R, t Decrement register, skip if zero  
None  
ANDWR R, t  
ANDWI  
IORWR R, t  
IORWI  
XORWR R, t  
XORWI  
AND W and register  
R Wt  
I WW  
R Wt  
I WW  
R Wt  
I WW  
/Rt  
Z
Z
Z
Z
Z
Z
I
AND W and immediate  
Inclu. OR W and register  
Inclu. OR W and immediate  
Exclu. OR W and register  
Exclu. OR W and immediate  
I
I
COMR R, t  
RRR R, t  
Complement register  
Rotate right register  
Z
011111 trrrrrrr  
010110 trrrrrrr  
R(n) R(n-1),  
C
CR(7), R(0)C  
010101 trrrrrrr  
RLR R, t  
Rotate left register  
R(n)r(n+1),  
C
CR(0), R(7)C  
CLRW  
Clear working register  
Clear register  
0W  
Z
010000 1xxxxxxx  
010001 0rrrrrrr  
0000bb brrrrrrr  
0010bb brrrrrrr  
0001bb brrrrrrr  
0011bb brrrrrrr  
100nnn nnnnnnnn  
101nnn nnnnnnnn  
110001 iiiiiiii  
110111 iiiiiiii  
111000 iiiiiiii  
010000 00001001  
010000 00000100  
CLRR  
R
0R  
Z
BCR R, b  
BSR R, b  
BTSC R, b  
BTSS R, b  
Bit clear  
0R(b)  
None  
None  
None  
None  
None  
None  
None  
C,HC,Z  
C,HC,Z  
None  
None  
Bit set  
1R(b)  
Bit Test, skip if clear  
Bit Test, skip if set  
Long CALL subroutine  
Long JUMP to address  
Return, place immediate to W  
Add immediate to W  
Subtract W from immediate  
Return from interrupt  
Return from subroutine  
Skip if R(b)=0  
Skip if R(b)=1  
NPC, PC+1Stack  
NPC  
LCALL  
LJUMP  
RTIW I  
ADDWI I  
SUBWI I  
RTFI  
N
N
StackPC, IW  
PC+1PC, W+IW  
I-WW  
StackPC,1GIS  
StackPC  
RET  
This specification is subject to be changed without notice. Please visit our web site for the most updated information.  
http://www.mdtic.com.tw P.14 2008/4 Ver. 1.0  
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