MDT10F630
(32).
96H : Port A interrupt-on-change control register.
Bit 7
-
Bit 6
-
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PAINTR
PINTA5
PINTA4
PINTA3
PINTA2
PINTA1
PINTA0
Bit 5-0 : Port A Interrupt-On-Change Control Bits
0 = Interrupt-on-change disable
1 = Interrupt-on-change enable
(33).
(34).
97 ~ 98H : Unimplemented register.
99H : Voltage reference control register.
Bit 7
Bit 6
-
Bit 5
Bit 4
-
Bit 3
Bit 2
Bit 1
Bit 0
VRSTA
CVREN
CVRRS
CVR3
CVR2
CVR1
CVR0
Bit 7 : Comparator Voltage Reference Enable Bit
0 = Comparator voltage reference disable
1 = Comparator voltage reference enable
Bit 5 : Comparator Voltage Reference Range Select Bit
0 = High range ; CVref = Vdd/4 + (CVR3:CVR0/32)*Vdd
1 = Low range CVref = (CVR3:CVR0/24)*Vdd
;
Bit 3-0 : Comparator Voltage Reference Value Selection
When CVRRS = 0, CVref = Vdd/4 + (CVR3:CVR0/32)*Vdd
When CVRRS = 1, CVref = (CVR3:CVR0/24)*Vdd
(35).
9AH : EEPROM data register.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EEDATA
EED7
EED6
EED5
EED4
EED3
EED2
EED1
EED0
(36).
9BH : EEPROM address register.
Bit 7
-
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EEADR
EEAD6
EEAD5
EEAD4
EEAD3
EEAD2
EEAD1
EEAD0
(37).
9CH : EEPROM control register 1.
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
Bit 2
Bit 1
WR
Bit 0
RD
EECON1
WRERR
WREN
Bit 7~4 is unimplemented : Read as “0”
WRERR : EEPROM Write Error Flag Bit.
0 = The EEPROM write operation completed
1 = The EEPROM write operation is prematurely terminated
(any MCLR reset or any WDT reset during normal operation)
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw P.11 2008/4 Ver. 1.0
MDTIC [ Micon Design Technology Corporation ]
