DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
Figure 17-1. IBO Basic Configuration Using Four SCTs
CI
RSYSCLK
TSYSCLK
CI
RSYSCLK
TSYSCLK
RSYNC
MASTER TRSSSYYNNC
TSSYNC
SLAVE #2
RSIG
RSIG
TSIG
SCT
TSIG
TSER
TSER
RSER
CO
CO
RSER
8.192MHz System Clock In
System 8KHz Frame Sync In
PCM Signaling Out
PCM Signaling In
PCM Data In
PCM Data Out
CI
RSYSCLK
TSYSCLK
CI
RSYSCLK
TSYSCLK
RSYNC
RSYNC
TSSYNC
TSSYNC
SLAVE #1
SALVE #3
RSIG
TSIG
RSIG
TSIG
TSER
RSER
TSER
RSER
CO
CO
17.1. Channel Interleave
In channel interleave mode data is output to the PCM data-out bus one channel at a time from each of the
connected SCTs until all channels of frame n from all each SCT has been place on the bus. This mode can
be used even when the connected SCTs are operating asynchronous to each other. The elastic stores will
manage slip conditions. See Figure 18-11 and Figure 18-5 for details.
17.2. Frame Interleave
In frame-interleave mode, data is output to the PCM data-out bus one frame at a time from each of the
connected SCTs. This mode is used only when all connected SCTs are synchronous. In this mode, slip
conditions are not allowed. See Figure 18-2 and Figure 18-6 for details.
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
