DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
Table 16-4. Boundary Scan Control Bits
BIT PIN
NAME
RCHBLK
JTMS
8MCLK
JTCLK
JTRST
RCL
JTDI
N.C.
N.C.
JTDO
BTS
TYPE
BIT PIN
NAME
CI
TSYNC.cntl
(Note 1)
TSYNC
TPOSI
TNEGI
TCLKI
TCLKO
TNEGO
TPOSO
TYPE
BIT PIN
NAME
A5
TYPE
2
—
1
1
2
3
4
5
6
7
O
I
62
61
36
—
I
29
28
71
72
I
I
A6
—
O
I
ALE
27
73
I
60
59
58
57
56
55
54
37
38
39
40
41
42
43
44
I/O
I
I
I
O
O
O
(AS)/A7
RD (DS)
CS
—
—
0
—
—
—
26
25
24
23
22
21
—
—
20
—
74
75
76
77
78
79
80
81
82
83
I
I
I
O
I
FMS
I
WR (R/W)
RLINK
RLCLK
DVSS
DVDD
RCLK
I
8
9
—
—
O
O
O
—
—
O
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
—
72
71
70
69
68
—
—
—
—
—
—
—
67
DVDD
DVSS
—
—
I
I
45
46
47
48
49
50
51
52
53
54
55
—
53
52
51
50
49
48
47
46
45
44
—
LIUC
8XCLK
TEST
N.C.
TCLK
I
O
I
DVDD
DVSS
—
TSER
I
—
19
18
17
16
15
14
13
12
11
10
9
84
85
86
87
88
89
90
91
92
93
94
95
96
97
TSIG
I
—
O
I
—
I
TESO
O
I
RDATA
RTIP
TDATA
TSYSCLK
TSSYNC
TCHCLK
CO
RPOSI
RRING
RVDD
RVSS
RVSS
MCLK
XTALD
N.C.
RVSS
INT
N/C
N/C
N/C
TTIP
TVSS
TVDD
TRING
TCHBLK
TLCLK
TLINK
I
I
I
RNEGI
I
I
—
—
—
I
RCLKI
O
O
I
RCLKO
RNEGO
RPOSO
RCHCLK
RSIGF
O
O
O
O
O
O
O
O
O
MUX
BUS.cntl
(Note 2)
D0/AD0
D1/AD1
D2/AD2
D3/AD3
43
–
—
O
—
42
41
40
39
—
56
57
58
59
60
I/O
I/O
I/O
I/O
RSIG
RSER
—
66
—
8
RMSYNC
RFSYNC
RSYNC.cntl
(Note 3)
RSYNC
RLOS/
O
7
—
—
—
—
—
—
—
65
64
63
—
—
—
O
DVSS
—
6
5
4
3
—
98
—
I/O
O
—
38
37
36
35
34
33
32
31
30
61
62
63
64
65
66
67
68
69
70
DVDD
D4/AD4
D5/AD5
D6/AD6
D7/AD7
A0
—
I/O
I/O
I/O
I/O
I
99
LOTC
RSYSCLK
—
100
I
—
32
33
34
35
O
O
O
I
A1
I
A2
I
A3
I
A4
I
Note 1:
Note 2:
Note 3:
0 = TSYNC an input; 1 = TSYNC an output.
0 = D0–D7/AD0–AD7 are inputs; 1 = D0–D7/AD0–AD7 are outputs.
0 = RSYNC an input; 1 = RSYNC an output.
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