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71M6543H 参数 Datasheet PDF下载

71M6543H图片预览
型号: 71M6543H
PDF下载: 下载PDF文件 查看货源
内容描述: 可选增益1或8的一个电流电能表计量芯片的补偿 [Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation]
分类和应用:
文件页数/大小: 157 页 / 2164 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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71M6543F/H and 71M6543G/GH Data Sheet  
5.4.4 Environment  
Before starting the CE using the CE_E bit (I/O RAM 0x2106[0]), the MPU has to establish the proper  
environment for the CE by implementing the following steps:  
Locate the CE code in Flash memory using CE_LCTN[5:0] (I/O RAM 0x2109[5:0]) in the 71M6543F/H  
and CE_LCTN[6:0] (I/O RAM 0x2109[6:0]) in the 71M6543G/GH  
Load the CE data into RAM.  
Establish the equation to be applied in EQU[2:0] (I/O RAM 0x2106[7:5]).  
Establish the accumulation period and number of samples in SUM_SAMPS[12:0] (I/O RAM  
0x2107[4:0], 0x2108[7:0]).  
Establish the number of cycles per ADC multiplexer frame (MUX_DIV[3:0] (I/O RAM 0x2100[7:4])).  
Apply proper values to MUXn_SEL, as well as proper selections for DIFFn_E (I/O RAM 0x210C[ ]) and  
RMTn_E (I/O RAM 0x2709[ ] in order to configure the analog inputs.  
Initialize any MPU interrupts, such as CE_BUSY, XFER_BUSY, or the power-failure detection interrupt.  
When different CE codes are used, a different set of environment parameters need to be established.  
The exact values for these parameters are listed in the Application Notes and other documentation which  
accompanies the CE code.  
Operating CE codes with environment parameters deviating from the values specified by Teridian  
leads to unpredictable results.  
Typically, there are fifteen 32768 Hz cycles per ADC multiplexer frame (see 2.2.2). This means that the  
product of the number of cycles per frame and the number of conversions per frame must be 14 (allowing  
for one settling cycle). The default configuration is FIR_LEN = 01, I/O RAM 0x210C[1] (two cycles per  
conversion) and MUX_DIV[3:0] = 7 (7 conversions per multiplexer cycle).  
Sample configurations can be copied from Demo Code provided by Teridian with the Demo Kits.  
5.4.5 CE Calculations  
Referring to Table 73, The MPU selects the desired equation by writing the EQU[2:0] (I/O RAM  
0x2106[7:5]).  
Table 73: CE EQU[2:0] Equations and Element Input Mapping  
Watt & VAR Formula  
(WSUM/VARSUM)  
EQU  
[2:0]*  
W0SUM/  
VAR0SUM  
W1SUM/  
VAR1SUM  
W2SUM/  
VAR2SUM  
I0SQ  
SUM  
I1SQ  
SUM  
I2SQ  
SUM  
VA*IA + VB*IB  
(2-element, 3-W, 3φ  
Delta)  
VA * IA  
VB * IB  
N/A  
IA  
IB  
2
VA*(IA-IB)/2 + VC*IC  
(2 element, 4W 3φ Delta)  
VA*(IA-IB)/2 + VB*(IC-IB)/2  
(2 element, 4W 3φ Wye)  
VA*IA + VB*IB + VC*IC  
(3 element, 4W 3φ Wye)  
VA*(IA-IB)/2  
VC*IC  
IA-IB  
IA-IB  
IA  
IB  
IC-IB  
IB  
IC  
IC  
IC  
3
4
VA*(IA-IB)/2 VB*(IC-IB)/2  
VA*IA VB*IB  
VC*IC  
5
Note:  
* Only EQU[2:0] = 5 is supported by the currently available CE code versions for the 71M6543. Contact  
your local Teridian representative for CE codes that support equations 2, 3 and 4.  
v1.2  
© 2008–2011 Teridian Semiconductor Corporation  
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