欢迎访问ic37.com |
会员登录 免费注册
发布采购

SXT6051 参数 Datasheet PDF下载

SXT6051图片预览
型号: SXT6051
PDF下载: 下载PDF文件 查看货源
内容描述: [Terminator, 1-Func, CMOS, PQFP208, PLASTIC, QFP-208]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 144 页 / 895 K
品牌: LevelOne [ LEVEL ONE ]
 浏览型号SXT6051的Datasheet PDF文件第12页浏览型号SXT6051的Datasheet PDF文件第13页浏览型号SXT6051的Datasheet PDF文件第14页浏览型号SXT6051的Datasheet PDF文件第15页浏览型号SXT6051的Datasheet PDF文件第17页浏览型号SXT6051的Datasheet PDF文件第18页浏览型号SXT6051的Datasheet PDF文件第19页浏览型号SXT6051的Datasheet PDF文件第20页  
SXT6051 STM-1/0 SDH Overhead Terminator  
Table 2: Signal Description (Sheet 9 of 11)  
Pin #  
Name  
Type  
Description  
10  
MMSPPAUEN  
O
Multiplexer Protection Payload Enable. Indicates the pres-  
ence of the VC-4 (in STM-1 mode) or VC-3 (in STM-0 mode)  
on the MMSPPDATA<7:0> bus. This pin is only used in a  
Master configuration.  
HiZ-4ma  
147, 148, DMSPPDATA<7:0>  
I/O  
TTLin-4ma  
Demultiplexer Protection Data Bus. This is byte wide data at  
19.44 MHz (STM-1) or 6.48 MHz (STM-0). It is an input in a  
Master configuration and an output in a Slave configuration.  
149, 150,  
151, 152,  
153, 154  
144  
DMSPPCKI  
DMSPPCKO  
I
Demultiplexer Protection clock. A 6.48 MHz (STM-0) or  
19.44 MHz (STM-1) signal used to clock DMSPPDATA<7:0>.  
This input is only used in a Master configuration.  
TTLin  
145  
O
Demultiplexer Protection clock. A 6.48 MHz (STM-0) or  
19.44 MHz (STM-1) signal used to clock DMSPPATA<7:0> in  
a Slave configuration or to clock the RSOH serial output data  
in a master configuration.  
HiZ-8ma  
143  
142  
141  
DMSPPJ0EN  
DMSPPAUEN  
DMSPPSF  
I/O  
TTLin-4ma  
Demultiplexer Protection Frame Indicator. An 8 KHz pulse  
that indicates the presence of the J0 byte on the  
DMSPPDATA<7:0> bus. The pin is programmed as an output  
in a Slave configuration and an input in a Master configuration.  
I/O  
TTLin-4ma  
Demultiplexer Protection Payload Enable. Indicates the  
presence of VC-4 (STM-1) or VC-3 (STM-0) data on the  
DMSPPDATA<7:0> bus. This pin is programmed as an output  
in a Slave configuration and an input in a Master configuration.  
I/O  
TTLin-2ma  
Signal Fail Indicator. This pin is programmed as an input in a  
Master configuration and as an output in a Slave configuration.  
In the Master configuration the value of this pin is reflected in  
register C3H<bit 3>. In the Slave configuration the value of  
this pin is the same as C1H<bit 5>.  
140  
DMSPPSD  
I/O  
TTLin-2ma  
Signal Degrade Indicator. The pin is programmed as an input  
in a Master configuration and an output in a Slave configura-  
tion. In the Master configuration the value of this pin is  
reflected in register C3H<bit 2>. In the Slave configuration the  
value of this pin is the same as 21H<bit 1>.  
16  
 复制成功!