LTC3649
OPERATION
The soft-start time t (from 08 to 908 of V ) is 2.3
This thus becomes a trade-off between simplicity and
OPTI-LOOP® optimization, where ITH components are
external and are selected to optimize the loop transient
response with minimum output capacitance.
SS
OUT
timesthetimeconstant(R •C ).TheISETpincanalso
SET SET
be driven by an external supply capable of sinking 50µA.
When starting up into a pre-biased V , the LTC3649 will
OUT
stayinBurstModeoperationandkeepthepowerswitches
Minimum On-Time Considerations
off until the voltage on ISET has ramped up to be equal
DuetothearchitectureoftheLTC3649,aminimumon-time
restriction is imposed such that the top power MOSFET
can have enough time to turn on and accurately determine
if it has reached its peak current level before shutting off.
The typical minimum on-time of the regulator is 60ns.
Thus, given an application with varying input and output
voltage ranges, the frequency must be designed to be
slow enough to ensure the minimum on-time restriction
is not violated.
to V , at which point the switcher will begin switching
OUT
and V
will ramp up with ISET.
OUT
Output Power Good
When the LTC3649’s output voltage is within the 7.58
window of the regulation point, which is divided down
as a V
voltage in the range of 0.555V to 0.645V,
PGDFB
the output voltage is in regulation and the PGOOD pin is
pulled high with an external resistor connected to INTV
CC
or another voltage rail. Otherwise, an internal open-drain
pull-down device will pull the PGOOD pin low. To prevent
unwanted PGOOD glitches during transients or dynamic
VOUT(MIN)
Freq(kHz)≤
60 •10−6 • VIN(MAX)
V
changes,theLTC3649’sPGOODfallingedgeincludes
OUT
Intherarecaseswheretheminimumon-timerestrictionis
violated, the frequency of the LTC3649 will automatically
andgraduallyfoldbackdowntoone-fifthofitsprogrammed
switching frequency to allow the output to remain in regu-
lation. This feature is designed for applications where the
input voltage only experiences momentary spikes in volt-
age. In such applications, the frequency does not have to
be programmed so slow to account for those momentary
spikes, thus significantly saving component size and cost.
a blanking delay of approximately 64 clock cycles.
Internal/External ITH Compensation
For ease of use, the user can simplify the loop compen-
sation by tying the ITH pin to INTV to enable internal
CC
compensation. Because the internal compensation is
required to provide a stable output voltage for a wide
range of switching frequencies, it is designed to have a
loop response that is typically much slower than optimal.
3649fb
12
For more information www.linear.com/LTC3649
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