TIVEꢀcommandꢀwhichꢀisꢀthenꢀfollowedꢀbyꢀaꢀREADꢀorWRITEꢀ
IS42S16400F
IC42S16400F
FUNCTIONAL DESCRIPTION
Initialization
Theꢀ64MbꢀSDRAMsꢀ(1ꢀMegꢀxꢀ16ꢀxꢀ4ꢀbanks)ꢀareꢀquad-bankꢀ
DRAMsꢀwhichꢀoperateꢀatꢀ3.3Vꢀandꢀincludeꢀaꢀsynchronousꢀ
interface (all signals are registered on the positive edge of
theꢀclockꢀsignal,ꢀCLK).ꢀEachꢀofꢀtheꢀ16,777,216-bitꢀbanksꢀisꢀ
organized as 4,096 rows by 256 columns by 16 bits.
SDRAMsꢀ mustꢀ beꢀ poweredꢀ upꢀ andꢀ initializedꢀ inꢀ aꢀ
predefined manner.
Theꢀ64MꢀSDRAMꢀisꢀinitializedꢀafterꢀtheꢀpowerꢀisꢀappliedꢀ
toꢀVD D ꢀandꢀVD D q (simultaneously), and the clock is stable
withꢀDQMꢀHighꢀandꢀCKEꢀHigh.ꢀ
ReadꢀandꢀwriteꢀaccessesꢀtoꢀtheꢀSDRAMꢀareꢀburstꢀoriented;ꢀ
accesses start at a selected location and continue for
a programmed number of locations in a programmed
sequence. Accesses begin with the registration of an AC-
A 100µs delay is required prior to issuing any command
other than a COMMANDꢀINHIBIT or a NOP.ꢀTheꢀCOMMANDꢀ
INHIBITꢀorꢀNOPꢀmayꢀbeꢀappliedꢀduringꢀtheꢀ100µsꢀperiodꢀandꢀ
continue should at least through the end of the period.
WithꢀatꢀleastꢀoneꢀCOMMANDꢀINHIBITꢀorꢀNOPꢀcommandꢀ
havingꢀbeenꢀapplied,ꢀaꢀPRECHARGEꢀcommandꢀshouldꢀ
be applied once the 100µs delay has been satisfied. All
banksꢀmustꢀbeꢀprecharged.ꢀꢀThisꢀwillꢀleaveꢀallꢀbanksꢀinꢀ
an idle state, afterꢀwhichꢀatꢀleastꢀtwoꢀAUTOꢀREFRESH cycles
must be performed. After the AUTOꢀREFRESH cycles are
complete,ꢀ theꢀ SDRAMꢀ isꢀ thenꢀ readyꢀ forꢀ modeꢀ registerꢀ
programming.
command.ꢀTheꢀaddressꢀbitsꢀregisteredꢀcoincidentꢀwithꢀtheꢀ
ACTIVEꢀcommandꢀareꢀusedꢀtoꢀselectꢀtheꢀbankꢀandꢀrowꢀtoꢀ
be accessed (BA0ꢀandꢀBA1ꢀselectꢀtheꢀbank,ꢀA0-A11ꢀselectꢀtheꢀ
row).Theꢀaddressꢀbitsꢀ(A0-A7) registeredcoincidentwiththe
READꢀorꢀWRITEꢀcommandꢀareꢀusedꢀtoꢀselectꢀtheꢀstartingꢀ
column location for the burst access.
Priorꢀ toꢀ normalꢀ operation,ꢀ theꢀ SDRAMꢀ mustꢀ beꢀ initial-
ized.ꢀTheꢀfollowingꢀsectionsꢀprovideꢀdetailedꢀinformationꢀ
covering device initialization, register definition, command
descriptions and device operation.
Theꢀ modeꢀ registerꢀ shouldꢀ beꢀ loadedꢀ priorꢀ toꢀ applyingꢀ
any operational command because it will power up in an
unknownꢀstate.ꢀAfterꢀtheꢀLoadꢀModeꢀRegisterꢀcommand,ꢀ
atꢀleastꢀtwoꢀNOPꢀcommandsꢀmustꢀbeꢀassertedꢀpriorꢀtoꢀ
any command.
Integrated Silicon Solution, Inc. — www.issi.com
15
Rev. A
03/19/08
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
