IS42S16400F
IC42S16400F
OPERATION
Activating Specific Row Within Specific Bank
BANK/ROW ACTIVATION
BeforeꢀanyꢀREADꢀorꢀWRITEꢀcommandsꢀcanꢀbeꢀissuedꢀ
toꢀaꢀbankꢀwithinꢀtheꢀSDRAM,ꢀaꢀrowꢀinꢀthatꢀbankꢀmustꢀbeꢀ
“opened.”ꢀThisꢀisꢀaccomplishedꢀviaꢀtheꢀACTIVEꢀcommand,ꢀ
which selects both the bank and the row to be activated
(see ActivatingꢀSpecificꢀRowꢀWithinꢀSpecificꢀBank).
CLK
HIGH - Z
CKE
CS
RAS
CAS
WE
After opening a row (issuingꢀanꢀACTIVEꢀcommand),ꢀaꢀREADꢀ
orꢀWRITEꢀcommandꢀmayꢀbeꢀissuedꢀtoꢀthatꢀrow,ꢀsubjectꢀtoꢀ
the tr c D specification. Minimum tr c D should be divided by
theꢀclockꢀperiodꢀandꢀroundedꢀupꢀtoꢀtheꢀnextꢀwholeꢀnumberꢀ
toꢀ determineꢀ theꢀ earliestꢀ clockꢀ edgeꢀ afterꢀ theꢀ ACTIVEꢀ
commandꢀonꢀwhichꢀaꢀREADꢀorꢀWRITEꢀcommandꢀcanꢀbeꢀ
entered.ꢀForꢀexample,ꢀaꢀtr c D specification of 20ns with a
125 MHz clock (8ns period) results in 2.5 clocks, rounded
toꢀ3.ꢀThisꢀisꢀreflectedꢀinꢀtheꢀfollowingꢀexample,ꢀwhichꢀcov-
ersꢀanyꢀcaseꢀwhereꢀ2ꢀ<ꢀ[tr c D (MIN)/tc k ] ≤ꢀ3.ꢀ(Theꢀsameꢀ
procedure is used to convert other specification limits from
time units to clock cycles).
A0-A11
BA0, BA1
ROW ADDRESS
BANK ADDRESS
AꢀsubsequentꢀACTIVEꢀcommandꢀtoꢀaꢀdifferentꢀrowꢀinꢀtheꢀ
same bank can only be issued after the previous active
rowꢀhasꢀbeenꢀ“closed”ꢀ(precharged).ꢀTheꢀminimumꢀtimeꢀ
intervalꢀbetweenꢀsuccessiveꢀACTIVEꢀcommandsꢀtoꢀtheꢀ
same bank is defined by tr c .
AꢀsubsequentꢀACTIVEꢀcommandꢀtoꢀanotherꢀbankꢀcanꢀbeꢀ
issuedwhilethefirstbankisbeingaccessed, whichresults
inꢀaꢀreductionꢀofꢀtotalꢀrow-accessꢀoverhead.ꢀTheꢀminimumꢀ
timeꢀintervalꢀbetweenꢀsuccessiveꢀACTIVEꢀcommandsꢀtoꢀ
different banks is defined by tr r D .
Example: Meeting tR C D (MIN) when 2 < [tR C D (min)/tC K ] ≤ 3
T0
T1
T2
T3
T4
CLK
READ or
WRITE
ACTIVE
NOP
NOP
COMMAND
t
RCD
DON'T CARE
Integrated Silicon Solution, Inc. — www.issi.com
19
Rev. A
03/19/08
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
