2-MBIT SmartVoltage BOOT BLOCK FAMILY
4.7 AC Characteristics—CE#-Controlled Write Operations
E
(1, 12)
—Commercial
Prod
VCC
BV-60
Sym
Parameter
3.3 ± 0.3 V(9)
50 pF
5 V ± 5%(10)
30 pF
5 V ± 10%(11) Unit
100 pF
Load
Note
Min
110
0.8
Max
Min
60
Max
Min
70
Max
tAVAV
Write Cycle Time
ns
µs
tPHEL
RP# High Recovery to CE#
Going Low
0.45
0.45
tWLEL
WE# Setup to CE# Going Low
0
0
0
ns
ns
tPHHEH Boot Block Lock Setup to CE#
Going High
6,8
200
100
100
VPP Setup to CE# Going High
tVPEH
5,8
3
200
90
100
50
100
50
ns
ns
tAVEH
Address Setup to CE# Going
High
tDVEH
tELEH
tEHDX
tEHAX
Data Setup to CE# Going High
CE# Pulse Width
4
90
90
0
50
50
0
50
50
0
ns
ns
ns
ns
Data Hold Time from CE# High
4
3
Address Hold Time from CE#
High
0
0
0
tEHWH
tEHEL
WE # Hold Time from CE# High
CE# Pulse Width High
0
20
6
0
10
6
0
20
6
ns
ns
µs
tEHQV1
Duration of Word/Byte
Programming Operation
2,5
Erase Duration (Boot)
Erase Duration (Param)
Erase Duration(Main)
VPP Hold from Valid SRD
tEHQV2
tEHQV3
tEHQV4
tQVVL
2,5,6
2,5
0.3
0.3
0.6
0
0.3
0.3
0.6
0
0.3
0.3
0.6
0
s
s
2,5
s
5,8
ns
ns
RP# VHH Hold from
Valid SRD
tQVPH
6,8
0
0
0
tPHBR
Boot-Block Lock Delay
7,8
200
100
100
ns
40
SEE NEW DESIGN RECOMMENDATIONS
INTEL [ INTEL ]
