2-MBIT SmartVoltage BOOT BLOCK FAMILY
E
4.4
DC Characteristics—Commercial (Continued)
BV-60
Prod
BV-80
BV-120
Sym
Parameter
VCC
3.3 ± 0.3 V
5 V ± 10%
Unit
Test Conditions
Note
Min
Max
Min
Max
VID
A9 Intelligent Identifier
Voltage
11.4
12.6
11.4
12.6
V
VIL
Input Low Voltage
–0.5
2.0
0.8
–0.5
2.0
0.8
V
V
VCC
+
VCC +
VIH
Input High Voltage
0.5V
0.5V
VCC = VCC Min
VOL
VOH
VOH
Output Low Voltage
0.45
0.45
V
V
V
V
I
OL = 5.8 mA
VCC = VCC Min
OH = –2.5 mA
VCC = VCC Min
OH = –2.5 mA
CC = VCC Min
OH = –100 µA
1
2
Output High Voltage (TTL)
Output High Voltage (CMOS)
2.4
2.4
I
0.85 ×
VCC
0.85 ×
VCC
I
V
VCC–
0.4V
VCC–
0.4V
I
VPPLK VPP Lock-Out Voltage
3
8
0.0
4.5
1.5
5.5
0.0
4.5
1.5
5.5
V
V
V
V
V
Total Write Protect
VPP at 5 V
VPPH1 VPP (Prog/Erase Operations)
VPPH2 VPP (Prog/Erase Operations)
VLKO VCC Erase/Prog Lock Voltage
11.4
2.0
12.6
11.4
2.0
12.6
VPP at 12 V
VHH
RP# Unlock Voltage
11.4
12.6
11.4
12.6
Boot Block Unlock
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at VCC = 5.0 V, T = +25 °C. These currents are valid for all
product versions (packages and speeds).
2.
I
I
CCES is specified with the device deselected. If the device is read while in erase suspend mode, current draw is the sum of
CCES and ICCR
.
3. Block erases and word/byte programs are inhibited when VPP = VPPLK, and not guaranteed in the range between VPPH1 and
VPPLK
.
4. Sampled, not 100% tested.
5. Automatic Power Savings (APS) reduces ICCR to less than 1 mA typical, in static operation.
6. CMOS Inputs are either VCC ± 0.2 V or GND ± 0.2 V. TTL Inputs are either VIL or VIH
7. For the 28F002B, address pin A10 follows the COUT capacitance numbers.
8. For all BV/CV parts, VLKO = 2.0 V for both 3.3 V and 5 V operations.
.
32
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INTEL [ INTEL ]
