Pentium® III Processor for the PGA370 Socket at 500 MHz to 866 MHz
11.The current specified is also for AutoHALT state.
12.Maximum values are specified by design/characterization at nominal Vcc
.
CORE
13.Based on simulation and averaged over the duration of any change in current. Use to compute the maximum
inductance tolerable and reaction time of the voltage regulator. This parameter is not tested.
14.dIcc/dt specifications are measured and specified at the PGA370 socket pins.
15.CLKREF must be held to 1.25V ±6.5%. This tolerance accounts for a ±5% power supply and ±1% resistor
divider tolerance. It is recommended that the motherboard generate the CLKREF reference from either the
2.5V or 3.3V supply. VTT should not be used due to risk of AGTL+ switching noise coupling to this analog
reference.
16.Static voltage regulation includes: DC output initial voltage set point adjust, Output ripple and noise, Output
load ranges specified in the tables above.
17.FMB - Flexible Motherboard recommendation.
Table 7. AGTL+ Signal Groups DC Specifications 1,
Symbol
Parameter
Min
Max
- 0.200
Unit
Notes
VIL
Input Low Voltage
Input High Voltage
Buffer On Resistance
–0.150
V
V
V
Ω
6
REF
VIH
V
+ 0.200
VTT
2, 3, 6
5
REF
Ron
16.67
Leakage Current for inputs,
outputs, and I/O
IL
±100
µA
4
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Pentium III processors at all frequencies.
2. All inputs, outputs, and I/O pins must comply with the signal quality specifications in Section 3.0.
3. Minimum and maximum VTT are given in Table 9 on page 26.
4. (0 ≤ VIN ≤ 1.5 V +3%) and (0≤VOUT≤1.5V+3%).
5. Refer to the processor I/O Buffer Models for I/V characteristics.
6. Steady state input voltage must not be above VSS + 1.65V or below VTT - 1.65V.
Table 8. Non-AGTL+ Signal Group DC Specifications 1
Symbol
Parameter
Input Low Voltage
Min
Max
- 0.200
REF
Unit
Notes
VIL
VIL
–0.150
V
V
V
V
V
V
9
1.5
2.5
Input Low Voltage
Input High Voltage
Input High Voltage
Output Low Voltage
-0.58
0.700
VTT
5, 8
6, 9
5, 8
2
VIH
VIH
V
+ 0.200
1.5
REF
2.000
3.18
2.5
VOL
VOH
0.400
7, 9, All outputs are
open-drain
Output High Voltage
VTT
V
IOL
ILI
Output Low Current
9
mA
µA
µA
Input Leakage Current
Output Leakage Current
±100
±100
3, 6
4, 7
ILO
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Pentum III processors at all frequencies.
2. Parameter measured at 9 mA (for use with TTL inputs).
3. (0 ≤ VIN ≤ 2.5V +5%).
4. (0 ≤ VOUT ≤ 2.5V +5%).
5. For BCLK specifications, refer to Table 17 on page 34.
6. (0 ≤ VIN ≤ 1.5V +3%).
7. (0 ≤ VOUT ≤ 1.5V +3%).
8. Applies to non-AGTL+ signals BCLK, PICCLK, and PWRGOOD.
9. Applies to non-AGTL+ signals except BCLK, PICCLK, and PWRGOOD.
Datasheet
25
INTEL [ INTEL ]
