Register Description
3.8.3.2
Offset 00h: ID—APIC ID Register
Offset:
Default Value: 00000000h
00h
Attribute: RW, RO
Size: 32 bits
The APIC ID serves as a physical name of the APIC. The APIC bus arbitration ID for the APIC is
derived from its I/OxAPIC ID. This register is reset to zero on power up reset.
Bits
Type
Reset
Description
31:28
27:24
RO
0
0
Reserved.
RW
I/OxAPIC ID (APICID): Software must program this value before using the
I/OxAPIC.
23:0
RO
0
Reserved.
3.8.3.3
Offset 01h: VS—Version Register
Offset:
Default Value: 00178020h
01h
Attribute: RO
Size: 32 bits
Contains information related to this I/OxAPIC for driver/ OS/software.
Bits
Type
Reset
Description
31:24
23:16
RO
RO
0
Reserved.
17h
Maximum Redirection Entries (MAX): This is the entry number of the
highest entry in the redirection table. It is equal to the number of interrupt
inputs minus one. This field is hardwired to 17h to indicate 24 interrupts.
15
RO
1
IRQ Assertion Register Supported (PRQ): This bit is set to 1 to indicate that
this version of the I/OxAPIC implements the IRQ Assertion register and allows
PCI devices to write to it to cause interrupts.
14:8
7:0
RO
RO
0
Reserved.
20h
Version (VS): This identifies the implementation version. This field is
hardwired to “20h” to indicate this is an I/OxAPIC.
3.8.3.4
Offset 02h: ARBID—Arbitration ID Register
Offset:
Default Value: 0000h
02h
Attribute: RO
Size: 32 bits
This register contains the APIC serial bus arbitration priority for the APIC, and is loaded whenever
the APIC ID register is loaded. The Intel® 6700PXH 64-bit PCI Hub does not support APIC bus
serial delivery and hence this register is never used.
Bits
Type
Reset
Description
31:28
27:24
23:0
RO
RO
RO
0
0
0
Reserved.
Arbitration ID (ARBID): Reflects the I/OxAPIC Arbitration ID.
Reserved.
154
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
