Register Description
Bits
Type
Reset
Description
12
RO
0
Delivery Status (DS): This field contains the current status of the delivery of
this interrupt. It is read only. Writes to this bit have no effect.
0 = Idle; no activity for this interrupt.
1 = Pending - interrupt has been injected, but delivery is held up due the
inability of the receiving APIC unit to accept the interrupt at this time.
11
RW
RW
0
0
Destination Mode (DSTM): This field determines the interpretation of the
Destination field.
0 = Physical; Destination APIC ID is identified by RDH bits [59:56].
1 = Logical; Destination is identified by matching bits [63:56] with the Logical
Destination in the Destination Format Register and Logical Destination
Register in each local APIC.
10:8
Delivery Mode (DELM): This field specifies how the APICs listed in the
destination field should act upon reception of the interrupt. Certain Delivery
Modes will only operate as intended when used in conjunction with a specific
trigger mode. These encodings are described in more detail in each serial
message. The encodings are:
000 = Fixed: Trigger Mode can be edge or level.
001 = Lowest Priority: Trigger Mode can be edge or level.
010 = SMI/PMI: Not supported.
011 = Reserved.
100 = NMI: Not supported.
101 = INIT: Not supported.
110 = Reserved.
111 = ExtINT: Not supported.
7:0
RW
0
Vector (VCT): This field contains the interrupt vector for this interrupt. Values
range between 10h and FEh.
3.8.3.7
Offset 11h, 13h,…, 3Fh: RDH—Redirection Table High Register
Offset:
Default Value: 00000000h
11h,13h,..,3Fh
Attribute: RW, RO
Size: 32 bits
The information in this register is sent on the system bus to address a local APIC. There is one of
st
nd
these registers for every interrupt. The 1 interrupt (pin 0) has this entry at offset 11h. The 2
rd
interrupt at 13h, 3 at 15h, etc., until the final interrupt (interrupt 23) at 3Fh.
Bits
Type
RW
Reset
Description
Destination ID (DID): This information is transferred in bits [19:12] of the
address.
31:24
0
Extended Destination ID (EDID): These bits are sent to a local APIC in
system bus delivery mode. These are bits [11:4] of the address.
23:16
15:0
RW
RO
0
0
Reserved.
§
156
Intel® 6700PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
