AV-51002
2015.12.16
2-61
FPP Configuration Timing when DCLK to DATA[] = 1
Symbol
Parameter
Minimum
Maximum
Unit
tCD2CU CONF_DONEhigh to CLKUSRenabled
4 × maximum
—
—
DCLKperiod
tCD2UM CONF_DONEhigh to user mode with CLKUSRoption on
C
tCD2CU
+
—
—
(17,408 × CLKUSR
period) (208)
Related Information
•
•
DCLK-to-DATA[] Ratio (r) for FPP Configuration on page 2-57
Configuration, Design Security, and Remote System Upgrades in Arria V Devices
(208)
To enable the CLKUSRpin as the initialization clock source and to obtain the maximum frequency specification on these pins, refer to the
“Initialization” section of the Configuration, Design Security, and Remote System Upgrades in Arria V Devices chapter.
Arria V GZ Device Datasheet
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