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5AGXMA1D4F27I5N 参数 Datasheet PDF下载

5AGXMA1D4F27I5N图片预览
型号: 5AGXMA1D4F27I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 622MHz, 75000-Cell, CMOS, PBGA672, ROHS COMPLIANT, FBGA-672]
分类和应用: 可编程逻辑
文件页数/大小: 182 页 / 2239 K
品牌: INTEL [ INTEL ]
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AV-51002  
2015.12.16  
1-52  
High-Speed I/O Specifications  
Symbol  
–I3, –C4  
Typ  
–I5, –C5  
Typ  
–C6  
Typ  
Condition  
Unit  
Min  
Max  
Min  
Max  
Min  
Max  
Total Jitter for Data  
Rate 600 Mbps – 1.25  
Gbps  
260  
300  
350  
ps  
tx Jitter -Emulated  
Differential I/O  
Standards with Three  
External Output Resistor  
Network  
Total Jitter for Data  
Rate < 600 Mbps  
0.16  
0.15  
0.18  
0.15  
0.21  
0.15  
UI  
UI  
tx Jitter -Emulated  
Differential I/O  
Standards with One  
External Output  
Resistor Network  
tDUTY  
TX output clock duty  
cycle for both True  
and Emulated  
45  
50  
55  
45  
50  
55  
45  
50  
55  
%
Differential I/O  
Standards  
True Differential I/O  
Standards(82)  
160  
250  
180  
250  
200  
300  
ps  
ps  
Emulated Differential  
I/O Standards with  
Three External  
Output Resistor  
Network  
tRISE and tFALL  
Emulated Differential  
I/O Standards with  
One External Output  
Resistor Network  
500  
500  
500  
ps  
(82)  
This applies to default pre-emphasis and VOD settings only.  
Arria V GX, GT, SX, and ST Device Datasheet  
Send Feedback  
Altera Corporation  
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