Switching Characteristics
Page 35
Table 30. High-Speed I/O Specifications for Arria V Devices (1), (2), (3) (Part 2 of 3)
–I3, –C4
–I5, –C5
Min Typ
–C6
Min Typ
Symbol
Conditions
Unit
Min Typ
Max
Max
Max
Total Jitter for Data Rate,
600 Mbps - 1.25 Gbps
—
—
—
—
—
—
160
—
—
—
—
—
—
160
—
—
—
—
160
0.1
ps
UI
ps
tx Jitter - True
Differential I/O
Standards
Total Jitter for Data Rate,
< 600 Mbps
0.1
0.1
—
—
tx Jitter - Emulated
Differential I/O
Total Jitter for Data Rate,
600 Mbps – 1.25 Gbps
260
300
350
Standards with Three
External Output
Resistor Network
Total Jitter for Data Rate
< 600 Mbps
—
—
—
—
0.16
0.15
—
—
—
—
0.18
0.15
—
—
—
—
0.21
0.15
UI
UI
tx Jitter - Emulated
Differential I/O
Standards with One
External Output
Resistor Network
—
TX output clock duty cycle
for both True and Emulated
Differential I/O Standards
tDUTY
45
—
50
—
55
45
—
50
—
55
45
—
50
—
55
%
True Differential I/O
Standards (13)
160
180
200
ps
Emulated Differential I/O
Standards with Three
External Output Resistor
Network
—
—
—
—
250
500
—
—
—
—
250
500
—
—
—
—
300
500
ps
ps
tRISE & tFALL
Emulated Differential I/O
Standards with One
External Output Resistor
Network
True Differential I/O
Standards
—
—
—
—
150
300
—
—
—
—
150
300
—
—
—
—
150
300
ps
ps
TCCS
Emulated Differential I/O
Standards
Receiver
SERDES factor
J = 3 to 10 (8)
150
—
1250
150
—
1250
150
—
1050
Mbps
True Differential I/O
Standards - fHSDRDPA
(data rate)
SERDES factor J ≥ 8 with
150
—
—
—
1600
150
—
—
—
1500
150
—
—
—
1250
Mbps
Mbps
Mbps
DPA (8), (10)
(9)
(14)
(9)
(14)
(9)
(14)
SERDES factor J = 3 to 10
fHSDR (data rate)
SERDES factor J = 1 to 2
Uses DDR Registers
(9)
(11)
(9)
(11)
(9)
(11)
DPA Mode
DPA run length
—
—
—
—
—
—
10000
300
—
—
—
—
10000
300
—
—
—
—
10000
300
UI
Soft CDR mode
Soft-CDR ppm
tolerance
ppm
December 2013 Altera Corporation
Arria V GX, GT, SX, and ST Device Datasheet
INTEL [ INTEL ]
