Processor Configuration Registers
Table 2-13. PCI Device 6 Register Address Map (Sheet 2 of 2)
Address
Offset
Register
Symbol
Register Name
Reset Value
Access
Message Signaled Interrupts Capability
ID
90–91h
MSI_CAPID
A005h
RO
92–93h
94–97h
98–99h
9A–9Fh
A0–A1h
A2–A3h
A4–A7h
A8–A9h
AA–ABh
MC
MA
Message Control
Message Address
Message Data
0000h
00000000h
0000h
RO, RW
RW, RO
RW
MD
RSVD
PEG_CAPL
PEG_CAP
DCAP
Reserved
0h
RO
PCI Express-G Capability List
PCI Express-G Capabilities
Device Capabilities
Device Control
0010h
RO
0142h
RO, RW-O
RO, RW-O
RO, RW
RO, RW1C
00008000h
0000h
DCTL
DSTS
Device Status
0000h
Link Capabilities
RO, RW-O, RO-
V, RW-OV
AC–AFh
B0–B1h
B2–B3h
LCAP
LCTL
LSTS
0521CC42h
0000h
Link Control
Link Status
RO, RW, RW-V
RW1C, RO-V,
RO
1001h
B4–B7h
B8–B9h
SLOTCAP
SLOTCTL
Slot Capabilities
Slot Control
Slot Status
00040000h
0000h
RW-O, RO
RO
RO, RO-V,
RW1C
BA–BBh
SLOTSTS
0000h
BC–BDh
BE–CBh
CC–CFh
D0–D1h
RCTL
RSVD
LCAP2
RSVD
Root Control
Reserved
0000h
—
RW, RO
—
Link Capabilities 2
Reserved
00000006h
0002h
RO-V
RWS, RWS-V
2.10.1
VID—Vendor Identification Register
This register combined with the Device Identification register uniquely identify any PCI
device.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/6/0/PCI
0–1h
8086h
RO
16 bits
Size:
Reset
Value
RST/
PWR
Bit
Access
Description
Vendor Identification (VID)
PCI standard identification for Intel.
15:0
RO
8086h
Uncore
162
Datasheet, Volume 2
INTEL [ INTEL ]
